This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”

This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”

All,

I received the Versatile Express Cortex-M Prototyping System + and am using DesignStart. I powered on the board and the operating system booted up without any problems.

In the V2M_MPS2/MB/HBI0263C/board.txt file, the following are the sequence of…

Hello, I started to tinker with the most basic Cortex-M0 from the DesignStart.
I am using Modelsim Student Edition, which run only on Windows (or Linux through Wine).

I tried to start with Linux to see if at least the "make" commands are working. Problem…

I saw, and tried in the past already, to simulate the Cortex-M0. It does not really matter efficiency, customization and so on, but only the learning process behind a steup for a correct very basic simulation.

I was trying to setup a Linux machine, when…

Hi,

I want to simulate CM3 Designstart with Modelsim.

When I launch Modelsim from Quartus 17.2 most of the files compile. But I get the following error:

** Error: C:/projects/AT421-MN-80001-r0p0-02rel0/smm/logical/smm_common_fpga/verilog/fpga_pll_speed…

Hi. First of all, thanks for your attention in advance. I have to say that I am completely new in FPGA programming, but I could have never imagined that running an example with a documentation explaining it step by step could be so cumbersome and error…