Hi All,
I am using UART to receive values and then write those values to SRAM. I am using the Texas Instruments Stellaris LM4F120 board.
For this purpose, I am using the memcpy() function to write the received values over UART to my SRAM base address defined…
How to compile in gcc 4.9.3 for CCM SRAM usage?
For the SRAM with Cortex M0, does it need to support byte write?
What restrictions do I have with Cortex M0 if the SRAM only support 32-bit write?
Hello, when I use stm32f103xx, I am confused of one of the boot modes it supported. One of the boot modes is booting from embedded SRAM while the I-BUS of Cortex-M3 is connected to FLASH only . When boots from SRAM, how Cortex-M3 fetches instructions…
Hello:
I need more RAM size on MSP2 board.
in Keil uVison 5, I add a simple code to write then read testing.
//-------------------------------------------------------
ram_addr=(volatile uint32_t *)(0x20400000);
for (j=0; j<1024; j++)
{
*ram_addr…
Hi,
I am just performing the first steps with the DesignStart Eval Edition (Cortex-M0), trying to compile the verilog sources to get a simulation running.
So I changed /systems/fpga_testbench/trl_sim/makefile to use gcc and modelsim and now I want to …
Hi,
I am using the MPS2+ board to debug my DesignStart Cortex-M0. The core is up and running and now I want to program the onboard SRAM. On the SDCard I can see that \MB\HBIO263C\AN387\images.txt expects an axf file.
Is it possible to generate an .axf…
I use the ARM Cortex-M3 DesignStart Eval on the FPGA platform, I use J-link to download the program to the system but the system is not properly implemented. I downloaded the generated Hex file via J-link to the FPGA development board via Keil. Is the…
