• Abort some questions of arm interrupt

    josh zhao
    josh zhao
    Note: This was originally posted on 20th June 2008 at http://forums.arm.com

    I try to understand arm interrupt,there are some questions I don't know,
      1.   Why the nested interrupt has to switch out of irq mode to svc mode?  I think  it only pushes…
    • over 6 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • Trigger a Software Interrupt

    Aquox
    Aquox

    Hi,

    I'm working on a Cortex-M4 (STM32F429-DISCO) with the Ravenscar profile, using Ada language.

    What I want to do is to trigger a software interrupt from a procedure in a task. This in order to have

    the same algorithm, which governs the interrupt…

    • over 1 year ago
    • Processors
    • Cortex-M / M-Profile forum
  • Cortex-M4 setup vector table for external interrupts

    Jo Van Montfort
    Jo Van Montfort

    I don't want to setup the vector table for all my external interrupts. For instance I only need the timer4 IRQhandler at IRQn 30. How can I make an offset in the table? Is this necessary?

    • Answered
    • over 5 years ago
    • System
    • Embedded forum
  • WFI Instruction

    Arun
    Arun

    Hi,

    I want to use the wfi instruction in my code. I'm sending a command to a module and wait for the reply.

    I have configured UART communication with the module. Will it be good to use wfi() instruction? I know that it will turn  the cpu to power down…

    • Answered
    • over 3 years ago
    • System
    • Embedded forum
  • Wake-up time from WFI

    EyalB
    EyalB

    How long does it take to wake up from from WFI once an interrupt occurs? 

    What system parameters does the answer depend on?

    What's turned off in the CPU (and elsewhere) while WFI is underway?

    I'm using NXP i.MXRT1050 (Cortex M7) and I'm experiencing…

    • over 1 year ago
    • System
    • Embedded forum
  • Resume execution after hardfault on cortex m0

    Ando
    Ando

    Hi all,

    I 'm an embedded software engineer and I'm currently working on a nRF51822 target which is a ARM m0. I want to design a fault logger to track errors in our code even it a debugger is not attached to the device at the moment of the fault.…

    • over 2 years ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • What is the top level difference in features between Cortex-M33 and Cortex-M4?

    Diya Soubra
    Diya Soubra

    This is a very common question.

    The diagram below is a pictorial description of the differences followed by some explanations.

    Cortex-M33 v Cortex-M4 features

    Starting from the bottom:

    • Cortex-M33 is an implementation of the ARMv8-M architecture. Full details are in my blog on the 5…
    • over 3 years ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • What is the top level difference in features between Cortex-M23 and Cortex-M0+?

    Diya Soubra
    Diya Soubra

    This is a very common question too.

    The diagram is a pictorial description of the differences followed by some explanations.

     

     

    Starting from the bottom:

     

    -Cortex-M23 is an implementation of the ARMv8-M architecture. Full details here.

    -Using the same debug…

    • over 3 years ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • Where can i find the DAP and WIC IP of Cortex-M0?

    Zhang l
    Zhang l

    Dears:

    I download the IP of cortex-M0 on the arm website, but there are no DAP (debug access port) and WIC(wakeup interrupt controller) code in it. is there anyone who knows where i can download the IP? Thanks very much!

    • Answered
    • over 2 years ago
    • DesignStart
    • DesignStart forum
  • Cortex-m0 interrupt_demo simulation issue

    Junyan
    Junyan

    Hi,

         I am using Cortex-M0 DesignStart Pro. When I simulation intrrupt_demo test case, I found that IRQ[31:0]  always 0, Is this correct?

         I saw the document , the interrupt_demo is Demonstration of interrupt features, but if no interrupt signal input…

    • Answered
    • over 1 year ago
    • DesignStart
    • DesignStart forum
  • Micro controller getting reseted periodically.

    A_P
    A_P

    Hi,

    I am using Nuvoton M058LBN. In my code, my while 1 there are some functions which should run continuously. But it was getting reseted . So for checking I printed some statement which is getting printed 10 times after which it stops printing and restarts…

    • Answered
    • over 1 year ago
    • Processors
    • Cortex-M / M-Profile forum
  • NVIC and ARM asm

    martin
    martin

    Cannot configure interupts of TIM6 on stm32f103 board

    Does my NVIC configuration wrong?

    Code:

    @ stm32f103 timer & interrupt test by laper_s (from 2019-02-02)
    
    .thumb
    .cpu cortex-m3
    .syntax unified
    
    .word   0x20005000
    .word   start + 1
    
    b   start…

    • Answered
    • over 1 year ago
    • Processors
    • Cortex-M / M-Profile forum
  • How many interruptions the pendent queue supports?

    Carlos Delfino
    Carlos Delfino

    The queue for the processors interrupt context-m supports how many pending interruptions?

    Complementing please send me information where I can read more details about it.

    Thank you.

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Using interrupts not implemented as Software interrupts?

    Carlos Delfino
    Carlos Delfino

    We know that a Cortex-M0 or any other Cortex-M may have fewer interruptions implemented the architecture defined in the standard, so we can not use interrupts implemented as software interrupts by manipulating the registers SETENA / ClrEnable and SetPend…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Using Reentrant interrupt on Cortex M family and GCC

    Carlo Alberto Avizzano
    Carlo Alberto Avizzano
    Dear Friends,here they are few lines of GCC-Assembly code to make your interrupt in Cortex-M4 fully
    reentrant. Please read notes from Sippey  before proceeding to details of implementation
    of this page.NOTE1: The code uses large amount of stack (even…
    • over 4 years ago
    • Software Tools
    • Tools, Software and IDEs blog
  • Cutting Through the Confusion with Arm Cortex-M Interrupt Priorities

    Miro Samek
    Miro Samek

    Arm Cortex-M processors offer very versatile interrupt priority management, but unfortunately, the multiple priority numbering conventions used in managing the interrupt priorities are often counter-intuitive, inconsistent, and confusing, which can lead…

    • over 6 years ago
    • System
    • Embedded blog
  • Optimizing a processor design for low power control applications

    Joseph Yiu
    Joseph Yiu

    ARM Cortex-M based microcontrollers are becoming the defacto standard for the next generation of low power control applications.This paper looks at the various criteria to be considered when selecting a processor for low power control applications, and…

    • Optimizing a processor design for low power control applications.pdf
    • over 6 years ago
    • Processors
    • Processors blog