Moved to:

https://community.arm.com/developer/ip-products/processors/f/cortex-a-forum/43775/shifted-binary-produced-by-arm-none-eabi-objcopy

I would like to know if any of the compilers/libraries for Cortex-M support the std::thread type (from the <thread> header) or if there is any plan to support that in the near future. I am interested in both Keil MDK / DS-5 or GCC for ARM. Thank you!…

I've just created another release of my bleeding-edge-toolchain script, which builds a complete toolchain for ARM microcontrollers. This toolchain uses the most recent versions of all possible components:

• gcc-9.1.0
• newlib-3.1.0
• binutils-2.32
• gdb…

Hello,

I 've a module with a Cortex-M4 Vybrid VF61 processor and an installed linux.

The installed linux does not provide gcc and gdb for native compiling and debugging.

Please, can anybody tell me, where I can download a prebuilt gcc and a prebuilt…

Hi, I am trying to find out where exactly the soft floating point code used in eabi for a M0+ comes from. When i compile a program using floating point using gcc_eabi, it generates code to carry out this operation. ( code included).

I downloaded the…

Dear All,
Currently now I'm trying to undersatnd the relationship between startup_ARMCM3.s and gcc_arm.ld from Cortex-M3 of MDK5.
the following codes are refered from Cortex-M3 of MDK5 example code.

1 //---startup_ARMCM3.s----------//
2
3 __HeapLimit…

shyam@shyam:~/projects/zynq/microzed/linux_source/Test_Chips$ make
make -C  /home/shyam/projects/zynq/microzed/linux_source/Test_Chips/../dev_tools/build
make[1]: Entering directory `/home/shyam/projects/zynq/microzed/linux_source/dev_tools/build'
Making…

  I've the following implementation for a svc exception handler on a cortex-m0:

    int  __attribute__((naked))  
    sv_call_handler(uint32_t n, uint32_t arg1, uint32_t arg2, uint32_t arg3,  
                    uint32_t arg4, uint32_t arg5)
     {
          irq_off();


When I built it for cortex…

Unlike the Design kit makefiles, in which tool-chain (Keil, DS5 or GCC) can be chosen, the Prototyping kit makefiles uses only DS5.

Is it possible to receive Prototyping kit makefiles that support tool-chain selection and in particular GCC?

Hi,

I am just performing the first steps with the DesignStart Eval Edition (Cortex-M0), trying to compile the verilog sources to get a simulation running.

So I changed /systems/fpga_testbench/trl_sim/makefile to use gcc and modelsim and now I want to …

Hi,

I am using the MPS2+ board to debug my DesignStart Cortex-M0. The core is up and running and now I want to program the onboard SRAM. On the SDCard I can see that \MB\HBIO263C\AN387\images.txt expects an axf file.

Is it possible to generate an .axf…

Hi,

I am working on a GPIO IP for Designstart Pro Cortex-M0. Now in my Simulation there are some Read-Modify-Write cycles in order to set only single bits in a 32 bit register.

If the GPIO register is 0x0000000X and I just want to set bit 16, GCC produces…

Hi,

I'd like to try and use external BRAM as the I/D memory for the Cortex-M1 DesignStart package for Xilinx FPGAs. The reference examples for Arty boards use the internal TCMs.

I've built a design in Vivado with a BRAM connected to the AXI3 port mapped…