Hi All!
I am working on STM32H745 dual-core controller and IAR Embedded Workbench for ARM toolchain V8.40.1 for development.
I have completed all my work on individual core test and debugging with help of ST-Link V3 as debugger but unfortunately, I am…
Hi all. Nice to meet you all and glad that I have a chance to join this group=)
Recently, I will do my final year project with the title of "Smart Home Control Using Brain Wave". Yet, I am not really sure on which arm that I should choose><…
Hello experts,
I have a question how to put instruction codes into ITCM?
I have only one experience of ITCM by STM32F7 based on Cortex-M7.
In the STM32F7 case, there is no path to write codes into ITCM from CPU.
Codes in the flash memory seem to be put automatically…
Hello experts,
The Cortex-M7 Lecture is opened on APS (ARM Partner Success) Site.
Also, #4 and #5 are described the details of Cortex-M7 pipeline.
However, I cannot understand the following parts of the lecture.
Could anyone teach me them more clearly in…
Hi I am working on Cortex M7. I am generating some interrupts and according to it my ISR is being called which I have already installed. After the execution of the ISR the PC is not returning to the instruction at the time of the interrupt, due to which…
Dear friend
Cortex-M7 has cache. After enable data cache, will data be stored to cache first when I send a large amount of data continually?
The size of data exceed the space of cache.
Thanks!
Amanda
I'm not a native English speaker. So, sorry for the broken English. I'm intend to develop a system where the microcontroller will interface with a 8 bit parallel port IC. The bytes will be loaded into the microcontroller at the specific timing. As documented…
In the appnote "ARM Cortex-M Programming Guide to Memory Barrier Instructions" there is a section that describes the use of memory barriers in the Cortex-M processors on a case-by-case basis.
Are those cases relevant for the Cortex M7 - especially…
Hi.
I have a question regarding Cortex-M4 processor with floating point unit. Is it somehow possible to do some computation in parallel in CPU (with integers) and FPU (with floats)?
Probably not, because both units need their own instructions to perform…
Hi All,
The title may seem a bit negative, just from my personal point of view.
What is the main reason of the two requirements of setting up MPU, namely size and start addresses of MPU regions.
First, the size of an MPU region must be 2^n x 32 bytes. This…
I need to be able to handle long bitfields as effectively as possible. Right now I need up to 64 bits in length.
Are there instructions to set, clear and test individual bits in one cycle available for some of the architectures? Which? Particularly, will…
I believe that many of us are interested in the ARM Cortex-M7.
Recently, jyiu posted a status update, where I asked a couple of questions about the architecture.
A few questions on the subject was also asked in the Interview and Question Time with Joseph…
what are the minimum hardware requirements to setup wifi on arm-7 processors.
Hello experts,
recently ARM updated the Cortex-M7 information.
I think the biggest topic would be that the pipeline details were opened.
The new information says that the integer pipeline is 4 stage and the floating point pipeline is 5 stage.
However, the…
Hi.
In the page 22 of the document below informs that the cortex-m7 has "zero overhead loops" capability. I would like to know how it is done? Is there a special instruction for it?
http://community.arm.com/servlet/JiveServlet/downloadBody/9595…
Hi all,
I did some of the investigation based on comparison of FPU based algorithms on CM4 and CM7 cores. All the code/data were placed into the single cycle memory with full utilization of modified / true Harvard architecture, it means:
- on CM4 - code…
Why nobody offers a dual core cortex-m7 solution for security applications, even if the lockstep functionality is provided?
Hi
i'm tring to implement code for lin interface by using driver functions for atsame70q21.i was done code it is compiled. i was debug the code check what in registers that time what i know is some registers are not configured i dont how to do that.is…
I've inherited some XDMAC code and no one that wrote this code really seems to be able to explain anomalies that I am seeing. So, I'm trying to understand just the basics in an attempt to make sure it was written correctly in the first place. Here we…
Hi Guys, I've just started programming in Assembler on the ATMEL SAM E70 Cortex M7 microcontroller.
Is there any assembler code snippets for Sam E70 for me to check out.
I'm an assembler programmer for years now and have just started on ARM Cortex assembler…
Greetings Community !
Im currently working on my custom real time kernel project (STM32F7). It was really in mature stage of developement, when i figured that its not compleately ISR safe, gets stucked sometimes, corrupts some data etc. Im rebuilding…
Good afternoon, dear collegs!
I'v started to connect STM32H7 (Cortex M7) MCU with exteranal Nor-Flash memory by use FMC. I'm alittle confused by write command. Without DSB() command it refuses to work correct. Program loads from embedded Flash (7 waitstaits…
Hello,
I am looking to do a moving average function using DSP instructions of ARM Cortex M7. Unfortunately I couldn't find a direct example. My goal is to have variables for
- the sum
- the new value
- the oldest value
Then the algorithm is sum =…
How long does it take to wake up from from WFI once an interrupt occurs?
What system parameters does the answer depend on?
What's turned off in the CPU (and elsewhere) while WFI is underway?
I'm using NXP i.MXRT1050 (Cortex M7) and I'm experiencing…
Can any one tell me what is the Buffer Depth of UART in Arm cortex M7 processor.
