Hello,

I am looking for a development board and software development kit with ARMv8M processors Cortex-M23.

I need to prototype trusted applications in c/c++ programming language for my research work.

 I am expecting availability of development libraries along…

I have been given the task of selecting a suitable processor for a project in which we will have a dedicated processor.

The project will involve configuring HW and inverting matrices in C.  We will use the Cholesky algorithm in double precision.  We don…

This question was raised in the 'How to implement a secure IoT system on ARMv8-M' webinar, view all the questions in the round up blog post. 

This question was raised in the 'How to implement a secure IoT system on ARMv8-M' webinar, view all the questions in the round up blog post. 

This question was raised in the 'How to implement a secure IoT system on ARMv8-M' webinar, view all the questions in the round up blog post. 

As a product manager for the Cortex-M33, I see this question pop up a lot. Below is my version of the answer.

Characteristics of TrustZone technology

• TrustZone is the security foundation for billions of ARM Cortex-A processor-based systems
• TrustZone…

Another question that I see come up once in a while.

Both the Cortex-M33 and the Cortex-M23 support TrustZone for ARMv8-M.

Cortex-M23 is the smallest lowest power TrustZone Cortex processor from ARM.

Cortex-M33 is a general purpose TrustZone processor…

Both processors have TrustZone for ARMv8-M. The following table compares the other top level features.

*Performance numbers are preliminary

Root of Trust implementation – Connected devices with authentication requirements need a root of trust in the system architecture. This is particularly important for devices that can be updated over the air. In a system with TrustZone technology, code…

This is a very common question.

The diagram below is a pictorial description of the differences followed by some explanations.

Starting from the bottom:

• Cortex-M33 is an implementation of the ARMv8-M architecture. Full details are in my blog on the 5…

This is a very common question too.

The diagram is a pictorial description of the differences followed by some explanations.

Starting from the bottom:

-Cortex-M23 is an implementation of the ARMv8-M architecture. Full details here.

-Using the same debug…

For those looking for more technical information for the Cortex-M33 the TRM is now posted in info center

http://infocenter.arm.com/help/topic/com.arm.doc.100230_0002_00_en/cortex_m33_trm_100230_0002_00_en.pdf

The Cortex-M23 TRM was posted a while b…

Hello,

I am using Cortex-M33 FVP model to run the Keil RTX TrustZoneV8M RTOS example.
Have also tried to experiment with the memory map configuration and the corresponding SAU region programming for NS/S patitioning and the behaviour is as expected.

However…

Hi,

I'm starting to explore this technology by running the TrustZone example application in Linux using GNU ARM Toolchain. This example is provided by a CMSIS software pack containing this example called "TrustZone for ARMv8-M No RTOS" which I was…

Where the system designer wants them to be, of course!

There is no restriction on where the various software modules reside. As with all other Cortex-M processors, the system designer is at liberty to build the solution that has the best fit for the target…

What is the difference between the TrustZone of Cortex M23/33 and the TrustZone of Cortex A?
Can you provide documentation on this topic? May I start to prototype my Cortex M23 application on a Cortex A processor and then migrate to Cortex M23 when chips…

Why should we call secure function in handler mode? What is the design purpose for this?  As we know, none-secure side can also call secure function in thread mode.

I have a set of tasks in FreeRTOS and I need to put some of them in the secure world (Trustzone).

Is there a communication to be established between the SMC trustZone side and the scheduler FreeRTOS side ?

tracks please.

Hi,

In RTOS Design Considerations Version 2.0 document, Section 2.2 ("SVCall and PendSV exceptions") following is mentioned.

When the processor is in Secure state, the SVC exception handling sequence fetches the exception vector from the Secure…

Hi, 

I'm using SAM L11 which is based on Cortex-M23.  I have difficulties understanding the boot sequence and have the following questions.

1. The software bootloader is stored in the BOOT region (B_S and B_NS). I am not sure if the software bootloader…