You may already know the Arm Musca-A, the first Platform Security Architecture (PSA) development platform with an Arm Cortex-M33 based subsystem, Arm TrustZone and reference architecture for Arm TrustZone-based systems. The board is a great tool to evaluate…

Authors: Kevin Yee, Cadence, and Jim Wallace, Arm

Unless you’re a hermit or have been living off the grid for the last few years, you can’t help but know about the explosion in big data – the increase in data size and networking bandwidth due to video…

Linaro provides a complete software stack for secure boot, u-boot, and Linux. This article explains how to build and run this software on Arm Fast Models. Although there is some existing information on this topic, there are two assumptions that often…

Arm offers Cycle Models for SystemC simulation. These models can be downloaded from Arm IP Exchange or created by users with Arm Cycle Model Studio (CMS). The models can be run in a SystemC only simulation environment from Accellera or in simulators from…

I already shared last month some details of work we have been doing with Arm on an HPC testchip, the good news continues with our announcement of extended support for the AMBA 5 protocol family with support for CHI.b in our Cycle-accurate performance…

By William Orme, Strategic Marketing Manager, Arm and Nick Heaton, Distinguished Engineer, Cadence

This is Part 3 of a 4 part series. Links below

Part 4

Cadence Interconnect Workbench

We have seen how a systematic process can be applied to validating…

By William Orme, Strategic Marketing Manager, Arm and Nick Heaton, Distinguished Engineer, Cadence

This is Part 3 of a 4 part series. Links below

Part 3

Use-case Performance Analysis

In the previous two parts we introduced the challenges facing designers…

By William Orme, Strategic Marketing Manager, Arm and Nick Heaton, Distinguished Engineer, Cadence

This is Part 2 of a 4 part series. Links below

Part 2

Performance Characterization

Because of the complexity of assembling and configuring the multitude…

By William Orme, Strategic Marketing Manager, Arm and Nick Heaton, Distinguished Engineer, Cadence

This is Part 1 of a 4 part series. Links below

Part 1

Introduction

The evolution of today’s system-on-chip (SoC) devices from uni-processor systems to heterogeneous…

How is the Internet of Things landscape like San Francisco in the 1800’s? Well the gold rush gave opportunity to many who came to find their fortune. They sought to move beyond the established order through applying new thinking to tap into the huge reserves…

Gone are the days when you used to use manual navigation aids to move around the town. Opening the Global Positioning System (GPS) to public use enticed technology firms to provide automation in navigation. Just by using your local coordinates and destination…

(This is one in a series of blog posts previewing Arm TechCon 2017 in Santa Clara. This post in particular highlights an IoT panel session scheduled for Thursday, The Road to One Trillion Devices).

By Shawn Prestridge, IAR Systems

2035 is only 18 years…

Earlier this month you may have noticed some press coverage regarding a collaboration between Xilinx, Arm, Cadence and TSMC to deliver 7nm test chip. 

There are some significant challenges assembling server SoCs for the infrastructure market with the latest…

In my last blog (Navigating SoC Verification with Perspec Portable Stimulus) I introduced the Accellera Portable Stimulus Standard (PSS) and how Cadence Perspec System Verifier supports the creation of portable baremetal Arm SoC integration tests using…

Arm & Cadence联合技术研讨会就在9月15日，上海！
来自Arm和Cadence的技术与产品专家将在此次研讨会上带来最新的Arm CPU、图像、IoT和汽车电子方面的创新，以及Cadence设计实现和验证的相关解决方案。此外，还有来自海思半导体的特邀主题演讲！座位有限，报名从速！

Join Cadence and Arm for a technical seminar featuring the latest Arm CPU, graphics, IoT, and automotive…

Many different companies are seeing the benefits of developing a custom chip. Sensor companies are making their sensors smart to increase their margins and stickiness. Electronics manufacturers are integrating a range of discrete components along with…

The modern SoC typically consists of billions of transistors and is normally designed with many modular IP blocks. Each of these blocks have been commercially licensed, developed or reused from previous designs. Integrating these components can be time…

Recently, Cadence Design Systems announced a suite of CCIX IP products which includes Controller, PHY and Verification IP. CCIX (pronounced “C6”) is an open coherent multichip standard that allows processors based on different instruction set architectures…