• AHB Bufferable/Non-bufferable write

    Hariprem Arora
    Hariprem Arora
    Note: This was originally posted on 12th September 2008 at http://forums.arm.com

    Hi,

    Please clarify the following issue related to AHB write:

    If HPROT[2] = 1, AHB write is bufferable and we need to provide OKAY response as soon as the AHB slave interface…
    • over 6 years ago
    • System
    • SoC Design forum

  • AMBA AHB HSPLITx signal.....

    LEO LEO
    LEO LEO
    Note: This was originally posted on 30th September 2008 at http://forums.arm.com

    Hi guys...

    I am trouble again..... :wacko:

    My question is :

    If slave 0 gives split error to two masters say master 0 and master 1...
    Now slave can generate Hsplitx for both masters…
    • over 6 years ago
    • System
    • SoC Design forum

  • AHB response relation with data

    Hariprem Arora
    Hariprem Arora
    Note: This was originally posted on 30th September 2008 at http://forums.arm.com

    Hi,

    I have an issue regarding AHB responses relation
    with data in case of AHB write transfers.

    As we know that the address phase of any transfer occurs during
    the data phase…
    • over 6 years ago
    • System
    • SoC Design forum

  • quiery about AHB burst mode

    Harsharaj ellur
    Harsharaj ellur
    Note: This was originally posted on 19th November 2008 at http://forums.arm.com

    hi,

    in the AHB burst mode is it the Master that drives consecutive address to slave, or is it that the master only sends the start address and Slave using this, HSIZE and HBURST…
    • over 6 years ago
    • System
    • SoC Design forum