Hello,
I am trying to do a proof-of-concept running the Apache NuttX RTOS on STMicroelectronic's ST32L562E-DK board as the non-secure application with TrustedFirmware-M (ST's port of TF-M provided with STM32CubeL5). The ARM core on STM32L5xx MCUs…
Hello,
I am trying to do a proof-of-concept running the Apache NuttX RTOS on STMicroelectronic's ST32L562E-DK board as the non-secure application with TrustedFirmware-M (ST's port of TF-M provided with STM32CubeL5). The ARM core on STM32L5xx MCUs…
I'm trying to relocate and dynamically change the vector table's contents. Keeping this in mind, I have the following code:
sample.c:
extern void svc_handler(void);
volatile uint32_t *VTOR;
stl_vect_t *vect = ptr; // I've ensured that ptr is aligned…
I will develop on cortex-M33 and M35P these days. I didn't find M35P's reference manual but I found that bit band is not referred in M33's reference manual. Because both of them are based on ARMv8-M, do they support bit band memory model? Thanks in advance…
M35P的reference manual没有找到,M33的reference manual中没有提到bit band,最近要基于这两个芯片开发,请问这两个支持位绑定(bit band)吗?
如题,请问ARMv8-M 和 ARMv7-M 两种架构都有哪些区别?
Hello there,
As I was reading the arch TRM some doubts emerged in the DWT component. When it talks about instruction address watching I am not sure if this refers to the address of the instruction or instruction itself. For example, let's say that I…
Hey,
As I am exploring the tracing capabilities present in the Cortex M33, there are some things that I am not able to understand fully, such as the connection between ETM and the tracing sinks. As I read, more doubts emerged, and the more confused I…
For the ARMv8M mpu, there is only two bits for the AP(access permission), another
XN bit for executable.
I wan't to mark a region (e.g. from 0~4096) with no any access, mainly used for NULL pointer
read/write check. For ARMv7M, the mpu has 3 bits
…Hi,
I'm reading through the sources of CMSIS-DSP and came across the following question:
The define of "ARM_MATH_DSP" is only set if the target architecture is "ARM_ARCH_7EM". Does this mean, that all functions defined for ARM_MATH_DSP are not used…
Hi there,
I came across the TrustZone for the more or less novel M33, but I'm having a little trouble finding a real-world scenario where the division into secure world and non-secure world makes sense.
Has someone of you got such a real world example…
Hello,
On exiting non-secure interrupt handler, armv8-M cm33 gets in a bad state and hangs.
I think what's happening is, on exiting non-secure handler, cpu try to restore state from a secure area, I see "sec_err_irq_mpc" fires right after non-secure irq…
Hello,
I'm working with a bare-metal application running on i.MX8 (QuadCore CortexA35 & Single Core CortexM4).
Currently, I use Load/Store executive assembly instructions along with memory attributes for the MMU to synchronize between the CortexA…
Hi,
I am trying to run the example for ARMCM33_DSP_FP_TZ code provided in Keil MDK on a new Cortex-M33 MCU by our company.
I have made necessary edits to the linker script to assign the correct values of secure and non-secure memory regions.
When I run…
Hello,
I have a Nuvoton M2351 (Cortex-M23) and I am trying to get RTX5 to run on it. The board initialization, secure main code and switch to non-secure main runs correctly but a hard fault is always triggered whenever osKernelInitialize() is called…
Hi Community,
For test purpose, I try to manually set the XPSR register with exception number 3, in this way
asm(
"ldr r0, =0x21000003 \t\n"
"msr xpsr, r0 \t\n"
);
__builtin_arm_dsb(0xF);
__builtin_arm_isb(0xF);
During the setting…
Dear All.
I am trying to back trace and get the call of faulty application after getting an exception, in this i need to update SP from HardFault Handler.
I tried in many way like "MOV SP, Rn" , "MSR SP, Rn" and etc but finally ended up with either Compilation…
Hi, I am new to ARMv8 architecture and while reading the v8 exception vectors I am not able to understand significance of adding SP_EL0 level vectors while SP_ELx vector set exists. What I am trying to find a use case where this is useful. I understand…
I am reading SMMU spec V2.0, and wondering why no C bit in SMMU_CBn_SCTLR. There is M bit in it.
Hi,
I'm using the Cortex-M33 and I would like to know if it's possible to change the Non Secure Vector table offset address (VTOR) while maintaining the Secure VTOR pointing to a different address.
The VTOR_S is located at 0xE000ED08 and the VTOR_NS…
Hello,
I am looking for a development board and software development kit with ARMv8M processors Cortex-M23.
I need to prototype trusted applications in c/c++ programming language for my research work.
I am expecting availability of development libraries along…
I have been given the task of selecting a suitable processor for a project in which we will have a dedicated processor.
The project will involve configuring HW and inverting matrices in C. We will use the Cholesky algorithm in double precision. We don…
Hello
I am new to the community and new to the ARM processor. I'm not even at the front door of this world and I already have a problem because when activating the debug mode, I get this message "Error Could not load file" and this "Debugger aborted!"…
Hi ashwildingarm,
Last week I posted question regarding the Juno r1: Juno r1 OpenEmbedded System Question , according to that question I need the latest Android for using OPTEE.
Since my final purpose is running OPTEE Trusted Application on the Juno board…
Hello Everyone,
I am trying to build test function which looks like below:
test.c
#include<stdio.h>
int mymain(int argc, char **argv) {
printf("Hellow World!\n");
return 0;
}
and I am using following build command to build the code…
This question was raised in the 'How to implement a secure IoT system on ARMv8-M' webinar, view all the questions in the round up blog post.