Hi,
I am currently working on an integrity enforcer running in a modified version of the ARM trusted firmware in EL3. To gain access to the memory I added 4 1GiB entries to the translation tables located in the TTBR0_EL3.
Now I am trying to hook the pagefault…
Hi all,
I am working on UltraZed-EG Starter Kit and trying to boot secondary A53 core from primary A53 core with an SMC call with 0xc4000003 as the identifier. I have measured the time taken to reach the entry point of secondary core and surprisingly…
I wonder how VA->PA translation is handled from non-secure world with Aarch64.
I see the HYP mode uses IPA so that the second stage translation may restrict the VM to certain memory.
But what about limiting access to secure memory? Is it only possible…
Hi,
I'm using a Juno r1 board and I'm trying to get processor's related CPU ID without using any header file like function sched_getcpu from sched.h.
The reason is I want to get the CPU number for TrustZone application and there is no way to…
I read TZ whitepaper. TZ's software architecture includes normal OS, secure OS, and a monitor that manages switching between two OS. The notion is clear. But how to implement them confuses me.
Running and managing two kernels on a SoC needs mechanism…
Hi Experts,
I'm reading white paper for ARMv7 and ARMv8.
but when i reading cache part and memory re-ordering, i have silly questions.....
Suppose there are below instructions..
Core A:
STR R0, [Msg]
STR R1, [Something…
Hi experts,
i am trying wakeup the secondary CPU core in bootloader, i am able to do this through a trusted firmware. The problem comes after wakeup!
Once the cpu is up it will be in EL-2 mode and it executes a predefined function…
Is it possible to for a Virtual Machine to switch the processor to the secure state ?
I have a Linux virtual machine hosted by KVM hypervisor . I plan to run the WPA2 authentication and other crypto functions in the secure world. Is this possible in ARMv8A…
I want to work the TrustZone program for ARMv8-M.
Is there TrustZone environment for ARMv8-M? (ex. software emulator.)
I used Foundation_Platformpkg for ARMv8-A.
Similar environment is available?
Hello,
I'm wondering what the correct way to mask non secure interrupts is, on entering secure world on an ARMv8-M processor, with Main and Security extensions. The scenario I have is as follows:
The SOC has 1 M33 core. I have a non secure OS that…
I have noticed there are also M23/M33 fvps under Keil IDE related path. Whether there is some difference about the startup parameters to run TF-M on Keil fvps compared to DS-5 fvps?
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