Hello,
I'm wondering what the correct way to mask non secure interrupts is, on entering secure world on an ARMv8-M processor, with Main and Security extensions. The scenario I have is as follows:
The SOC has 1 M33 core. I have a non secure OS that…
I have noticed there are also M23/M33 fvps under Keil IDE related path. Whether there is some difference about the startup parameters to run TF-M on Keil fvps compared to DS-5 fvps?
In software there are often cases where you need to have critical interrupts serviced. For example, for:
With the ARMv7-M architecture this can be achieved using nested interrupt handlers, but…
