• no C bit in SMMU_CBn_SCTLR

    Jerry
    Jerry

    I am reading SMMU spec V2.0, and wondering why no C bit in SMMU_CBn_SCTLR. There is M bit in it.


    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • What will be happened if I insert a store instruction behind a LDREX instruction for accessing the same address?

    Jay.Dong
    Jay.Dong

    There is a system with two CPU,for example,cpuA and cpuB. Firstly, cpuA issue a LDREX for accessing the address A,and cpuB issued a STORE for writing the address A. If CPUA send a STREX for writing the address A after the Store issued by cpuB。 I notice…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-R / R-Profile forum
  • Thirdparty RTOS support for ARM V8

    techguyz
    techguyz

    Hi Experts,

    Is there any 3rd party RTOS support for the ARM V8 architecture based processors ?

    If so what are all they ?

    Regards,

    Techguyz

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Arm Technical Training – Any time, any place

    Matt_Rushton
    Matt_Rushton

    Partner Training at Arm has been a great success over the last 15 years. It has expanded the knowledge and capabilities of our Partners’ Engineering teams by delivering classroom sessions to over 4000 attendees in 2016 alone and has helped our Partners…

    • over 2 years ago
    • Processors
    • Processors blog
  • ARM Brings Compute Scalability Into Infotainment and Connected Car Systems

    Soshun Arai
    Soshun Arai

    In the last decade, the automobile’s navigation system or in-vehicle infotainment (IVI) has become more popular in the market. Recently, even entry-level vehicles are installing an IVI system with large displays. We are seeing many automobile manufacturers…

    • over 6 years ago
    • Internet of Things
    • Internet of Things