• How to do the ARM state change between 64-bit and 32-bit?

    Prasad
    Prasad

    Hi,

    The latest 64-bit architecture can on both AArch64 and AArch32 state.

    Can someone tell me how to utilize this feature so that I can seamlessly integrate algorithms (which are optimized with 32-bit and 64-bit instructions) with applications which are…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Why does FPU performance differ in AArch64 and AArch32 with Cortex-A53?

    Yasuhiko Koumoto
    Yasuhiko Koumoto

    Hello experts,


    I have come to having a question.
    VFP Benchmark is a benchmark application which was made by a certain Japanese in order to measure ARM VFP performance especially for ARMv7-A and ARMv8-A.
    The software can be downloaded from the following link…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • ARMv8 Secure EL1 problem

    Steven Meng
    Steven Meng

    Hi, arm experts,

    We want to use ARCH32 mode in secure EL1, I see some descriptions in ARMv8 Arch Reference Manual about Secure EL1 ARCH32 mode as follows:

    One is the VBAR(secure), it is mapped to  VBAR_EL3, the other is SCTLR (secure), it is mapped to …

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • indicator for A core system timer implemented or not

    hostia
    hostia

    Hi ARM expert,

        In ARM V7 RM, I saw "This chapter describes the implementation of the ARM Generic Timer as an OPTIONAL extension to an ARMv7-A or ARMv7-R processor implementation.". So, I think it means that a SoC implementation…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • ARMv8-A: Is an ISB instruction required after writing to the CPSR register in AARCH32 state?

    Phenix Chen
    Phenix Chen

    For example, write cpsr as following code snippets:

    mov r1, sp

    movw lr, #0x393

    movt lr, #0

    msr cpsr_cxsf, lr

    do_irq:

    ...

    Is an ISB instruction required after "msr cpsr_cxsf, lr"?

    Thank you in advance!

    • Answered
    • over 1 year ago
    • Processors
    • Cortex-A / A-Profile forum
  • could anybody help me to write a bare metal startup code for LS1043A (ARM V8,A53)in 32bit(AARCH32)mode

    RanadeepReddy
    RanadeepReddy

    excuse me for my English!!!

    i want to write bare-metal startup code in 32-bit mode for LS1043A-Rdb.it is having V8 A53 core.

    i have bare-metal 32bit(AARCH32) code for xilinx processor(which is of V8,A53core).How much of that code is useful to write code…

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • help me to understand this assembly program for configuring MMU for ArmV8,A53.

    RanadeepReddy
    RanadeepReddy

    ******************************************************************************/
    /*****************************************************************************/
    /**
    * @file translation_table.s
    *
    * @addtogroup a53_32_boot_code
    * @{
    * <h2> translation_table…

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Confusion about exception level of ARMv8

    Xinwei
    Xinwei

    Hi,

    I am fairly new to ARM processor and start work with cortexA57 recently.  After reading the technical manual and programmer guide , I have some questions regarding the exception level of v8.

    1. How does the exception level change from one to…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Could anybody tell me how to boot up a processor in AARCH32 bit mode in Arm V8 and A53 core?

    RanadeepReddy
    RanadeepReddy

    can you please tell me how to boot up a processor in 32 bit mode for Armv8, A53 core using baremetal code?

    how can i know it is booted in 32bit mode?

    Thanks.

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Armv8-A architecture: 2016 additions

    David Brash
    David Brash

    The Armv8-A architecture continues to evolve, with the additions developed through 2016 collectively known as Armv8.3-A. Grouping enhancements in this manner helps the ecosystem manage tools and software support alongside the large numbers of Armv8-A…

    • over 3 years ago
    • Processors
    • Processors blog
  • Is it possible to implement EL3 AArch64 and change it later to EL3 AArch32?

    유영현
    유영현

    I was reading the ARM architecture reference manual... and thought

    Is it possible to implement EL3 AArch64 and change it later to EL3 AArch32?

    How to change is...

    If I start on cold reset, it will start at EL3 AArch64.

    Right after the cold reset, I set the…

    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • ARMv8 backwards compatibility with ARMv7

    Farhan
    Farhan

    Hi there,

    I have been going through a lot of ARMv8 documents, and I have a very basic question:

    -Can I take a Linux Kernel, compiled for a ARMv7 device, and run it on an ARMv8 device in Aarch32 execution mode?

    ( Lets assume that the two SOCs are identical…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum