• manually setting ELR_ELx register value

    Anes
    Anes

    Hi all,

    The main differences in ARMv8 EL3 is that it has its own MMU and it can only be entered via SMC and exit via ERET instruction. ERET instruction reads from ELR_EL3 (Exception Link register) and continue execution from that address (of course changing…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • ARMV8 TCR_EL1

    mike yuan
    mike yuan

    Hi,experts:

    在armv8手册中，TCR_EL1寄存器有一些位如：SH0、ORGN0、IRGN0控制转换表的cacheable、shareable属性。那就是说translation table配置的memory属性必须与 TCR_EL1中相同？如我在 TCR_EL1中设置为 outer Non-cacheable，而在translation table中设置的是 write-back，那最终memory的属性是什么？如果必须一致，那TTBR存的页表都要相同属性了？TCR_EL1只能影响normal…

    • over 6 years ago
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