Hi everyone,
Wherever I go on internet, the thing I read is that when SMC instruction is executed an exception is generated, it takes you to the highest exception level (EL3) where secure monitor is running.
In ARM v8 vector table, given on ARMv8-A architecture…
In my last blog (Navigating SoC Verification with Perspec Portable Stimulus) I introduced the Accellera Portable Stimulus Standard (PSS) and how Cadence Perspec System Verifier supports the creation of portable baremetal Arm SoC integration tests using…
Hi,
I am using ARM cortex A-57 processor and I build image with my own startup code and ld script. The image is loaded with u-boot. When I tried booting the image, it is aborting with following message:
## Booting kernel from Legacy Image at 48080000…
I have compiled a simple "Hello World" program on DS-5 ultimate evaluation version and couldn't find a bare metal FVP on which I can run it. When I select "ARM FVP->VE_AEMv8x1->Bare Metal Debug->Debug ARMAEMv8-A" in "Connection" tab of "Debug Configuration…
