• CORTEX-A processor interrupt handling

    Girish Raghavendran
    Girish Raghavendran

    Since I am currently reading lot of ARM documents to understand the architecture as a whole, I request you to mention as to what happens in case of CORTEX-A processor in the nested interrupt handler implementation since we have a SPSR in CORTEX-A processors…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • Performance effect because of removing some instructions from ARMv8?

    Natesh Raina
    Natesh Raina

    I was going through the ARMv8 Architecture Reference Manual and I came to know that it does not support many instructions that were previously supported by ARMv7 architecture. For example ARMv8 does not support conditional codes and have a seperate instruction…

    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • ARM Zynq Cortex-A53: implementing complex matrix inversion

    Laurent38
    Laurent38

    Hello,

    I am developing embedded software on Zynq MPSOC Cortex-A53 (Armv7/Armv8) for image processing, and I need some help for developing a specific algorithm.

    The algorithm involves many calculations of FFT and matrix using. As highest priority, we…

    • over 1 year ago
    • System
    • Embedded forum

  • ARMv7 Vs ARMv8 AArch32 Performance improvement

    arunsvasan
    arunsvasan

    Hello,

    I'm using an ARMv8 processor in 32 bit ARMv7 compatibility mode.

    I would like to know if there is any difference (performance gain) in ARMv8 running in AArch32 mode Vs running the same on an an ARMv7.

    Thanks!

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • CoreSight / ETM / CTI等等，它们之间的关系？

    chinatiger
    chinatiger

    hi, experts:

    在看ARMv7/v8 ARM手册的时候，总是不太明白CoreSight / ETM / CTI等等，它们之间的关系。

    以Cortex-A57 MPCore TRM的Figure 2-1为例：

    它展示了CA57's block diagram

    1. 如果仅仅使用JTAG tool，通过HW/SW breakpoint进行debug

        只需要：Debug-->APB --> Debug and CTI --> Debug path…

    • Answered
    • over 6 years ago
    • 中文社区
    • 中文社区论区

  • Branch Predictor detailed info

    techguyz
    techguyz

    Hi all,

    Is there any document related to the branch predictor algorithm utilized in the ARMV7 and ARMV8 and how the software (ABI) can be aptly developed ac-complying the same ?

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • Difference between co-processor registers and System registers

    techguyz
    techguyz

    Hi all,

    In ARMv-7 the co-processor register is used to configure the TCM, cache, MMU, MPU, etc.

    In ARMv-8 the co-processor logic is removed and integrated as the system register. Is there any performance difference by doing that ?

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • 有没有人总结过ARMv7和ARMv8的区别？

    Lu Wenjin
    Lu Wenjin

    要公开的资料，不要内部的Confidential信息

    • Answered
    • over 6 years ago
    • 中文社区
    • 中文社区论区

  • Critical interrupts

    Michael Williams
    Michael Williams

    In software there are often cases where you need to have critical interrupts serviced. For example, for:

    • Code profiling
    • Kernel debugging
    • Watchdog handling
    • Error handling.

    With the ARMv7-M architecture this can be achieved using nested interrupt handlers, but…

    • over 5 years ago
    • Processors
    • Processors blog