Since I am currently reading lot of ARM documents to understand the architecture as a whole, I request you to mention as to what happens in case of CORTEX-A processor in the nested interrupt handler implementation since we have a SPSR in CORTEX-A processors…
reason for ARMv8 EDSCR err bit set
Hi,
I'm working on a project which is for debugging cortex-a53 through Jtag interface.
The Jtag clock TCK is set to 300kHz which is pretty low, and I can properly read back debug registers such as EDSCR and EDPRSR. EDPRSR is 1 before I issue the 'halt…
- over 5 years ago
- Processors
- Cortex-A / A-Profile forum
ARMv8 Assembly Language IDE
I'm currently using Windows Notepad to program my Raspberry Pi in assembly language and I run it through 'as' and 'ld' to create the binary output. I would like to use an editor that has syntax highlighting specific to the version of ARM I'm using (in…
- over 2 years ago
- Processors
- Cortex-A / A-Profile forum
ARMv7 Vs ARMv8 AArch32 Performance improvement
Hello,
I'm using an ARMv8 processor in 32 bit ARMv7 compatibility mode.
I would like to know if there is any difference (performance gain) in ARMv8 running in AArch32 mode Vs running the same on an an ARMv7.
Thanks!
- over 3 years ago
- Processors
- Cortex-A / A-Profile forum
What is the PMU counter resolution when the processor switches between 64-bit and 32-bit mode?
Hi experts,
The PMU counter value is mentioned as 64 bit in ARMV8 manual.
What is the PMU counter resolution when the processor switches between 64 bit and 32 bit mode
- over 6 years ago
- Processors
- Cortex-A / A-Profile forum
Entering aarch32 state through software instruction
Hi,
I have a 64bit application running on armv8(foundation model)
My question is
1. Can I link aarch32 library to aarch64 application ?
2. Is there a way to enter aarch32 state when application is running in aarch64 state in Exception level 0 ? I tried…
- over 6 years ago
- Software Tools
- Arm Development Studio forum