Hi everybody!!
I have a question on how get cache size on ARM v7-A, more specifically on A9 (or A7 or A15).
In accordance with the TRM at page 1529 I get the value from CSSIDR register and I compute the cache size. More precisely, I do cache size = num…
Dear,
I am an greenhand developer on cortex-a15.
now I need some specification as follows:
where I can get the instruction set of cortex-A15?
are there some documents about optimization technology on cortex-A15(image processing optimization)
Thanks a lot.
When two clusters(Big/Little) exist in SoC, the timer can be used to support Synchronization between two clusters.
But How to understand "Synchronization", anybody can tell me some typical application context? I am really confused......
And, if…
Hi,
When I read Thumb-2 instruction manual, it is not clear to me about SDIV availability. Especially I do not understand the last line "are not available in ARM state."
Could you explain it to me?
Thanks,
New functionality introduced with Thumb…
Hi,
I am working on a hardware platform having 2 Cortex-A15 cores (with virtualization extensions). For routing IRQ's at PL2 to PL3 ( to hypervisor mode), I am setting HCR.IMO bit and it is working fine for core-0. If I set the HCR.IMO for core-1, will…
I'm doing some testing on Exynos5422 SoC which implements big.LITTLE architecture (A7 + A15), I'm running bare metal application which starts in HYP mode. I haven't returned from HYP mode by accident and then software delay which I implemented by simple…
With the first Cortex-A53 based SoCs due to ship in the coming months, and Cortex-A57 based designs to follow early next year, ARM gave us a quick update on performance expectations for both cores. Given the timing of both designs we'll see a combination…
By now, everyone knows that the ARM Cortex-A15 processor is ARM’s highest performance v7a ARM core to date. The Cortex-A15, along with the other ARM-based cores, are helping tablets surge a projected 53.4% this year, and has been part of some flagship…
The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…
A question that I am asked many times is – what is the fundamental difference between the high efficiency, mid range and the high performance application processors in the ARM Cortex family?
The simple answer to this is – the power budget…
An excellent whitepaper that describes the features of Cortex-A7 and applications of this little processor.
This white paper describes in detail the design choices considered including choice of feature set and performance level, and how its simplified…
