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Around the world thousands of engineers have been asked to work from home. Temporarily gone are the days of global travel, and with it the ‘traditional’ development and global…
What I'm asking is ARM Architecture Reference Manual for ARMv8-A says in AArch32 there are two translation table formats:
On page G4-4726 (Issue B.b), there are various points listed that each…
Hi All,
What is the difference between ARM cortex-A and cores in snapdragon from Qualcomm? I know that they say it is compatible with ARMv7/8 ISA.
Regards
Nitin
Hello experts,
I have come to having a question.
VFP Benchmark is a benchmark application which was made by a certain Japanese in order to measure ARM VFP performance especially for ARMv7-A and ARMv8-A.
The software can be downloaded from the following link…
Hi, arm experts,
We want to use ARCH32 mode in secure EL1, I see some descriptions in ARMv8 Arch Reference Manual about Secure EL1 ARCH32 mode as follows:
One is the VBAR(secure), it is mapped to VBAR_EL3, the other is SCTLR (secure), it is mapped to …
I read TZ whitepaper. TZ's software architecture includes normal OS, secure OS, and a monitor that manages switching between two OS. The notion is clear. But how to implement them confuses me.
Running and managing two kernels on a SoC needs mechanism…
Hi Experts,
I'm reading white paper for ARMv7 and ARMv8.
but when i reading cache part and memory re-ordering, i have silly questions.....
Suppose there are below instructions..
Core A:
STR R0, [Msg]
STR R1, [Something…
Hello Community,
I am currently learning hypervisor design using ARM's virtualization extensions (on both ARMv7 and ARMv8).
A note in the ARMv8-A reference manual (section D1.5) mentions:
"In some systems, a Guest OS is unaware that it is running on…
Hi Experts,
I was going through the arm v8 mmu page table formation, when it's compared to arm v7 it is completely different.
I could…
Hi ARM expert,
In ARM V7 RM, I saw "This chapter describes the implementation of the ARM Generic Timer as an OPTIONAL extension to an ARMv7-A or ARMv7-R processor implementation.". So, I think it means that a SoC implementation…
ARMv8 introduces this new attribute of memory type. (B2.8.2)
And also it recommends that "early write acknowledgement" attribute should be exported to interface between PE and interconnect fabric. (J4.1.1)
However, there is no any clue about…
Hi Experts,
I have binaries built for armv7 architecture, without rebuilding binaries can I run on armv8?. I think its possible, but wanted confirm is there any limitation?
Thanks,
Veeranna
Hi !
When MMU is enabled, and a undefined abort exception is triggered, are we sure that the address stored in the `lr` / `elr_elx` registers is actually mapped by the MMU, or should I check that before trying to access the address ?
Best,
V.
现在想优化arm cpu 的运算能力，看到这两个库 ne10 和ACL，如果只针对cpu（比如A9和A53），那个库的运算性能更好？
题外话，NE10和ACL 的定位和区分度？
Partner Training at Arm has been a great success over the last 15 years. It has expanded the knowledge and capabilities of our Partners’ Engineering teams by delivering classroom sessions to over 4000 attendees in 2016 alone and has helped our Partners…
With the first Cortex-A53 based SoCs due to ship in the coming months, and Cortex-A57 based designs to follow early next year, ARM gave us a quick update on performance expectations for both cores. Given the timing of both designs we'll see a combination…
The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…
A question that I am asked many times is – what is the fundamental difference between the high efficiency, mid range and the high performance application processors in the ARM Cortex family?
The simple answer to this is – the power budget…
