• How Does the Secure World Work with Multicore System?

    Shengye Wan
    Shengye Wan

    Hi experts,

     

    From my experience, for the single-core architecture, once we enter the secure world, the normal world would be paused. However, I'm not sure how does secure world is scheduled for the multicore system? 

    Do we still have to pause the normal…

    • Answered
    • over 3 years ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • How to Get the PA instead of IPA from NS OS Kernel Module of an AArch64 device?

    Shengye Wan
    Shengye Wan

    Hi experts,

    Recently I want to conduct one secure-related scanning in TrustZone for some NS kernel memory.

    To do this, I need at first reporting the PA of the memory from NS kernel. My idea is developing a kernel module to achieve the goal.

    I write the 

    …
    • over 3 years ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • Is OPTEE_OS for Juno using 32-bit arch or 64-bit arch?

    Shengye Wan
    Shengye Wan

    Hi experts,

     

    I'm wondering do you compile the OPTEE_OS in this instruction as arm32 or AArch64? In which script do you set the compiler for the secure OS? ( I checked the file build-optee-os.sh while I find the file exports both compilers so I'm not…

    • Answered
    • over 3 years ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • A couple of use cases for TrustZone for ARMv8-M

    Diya Soubra
    Diya Soubra

    Root of Trust implementation – Connected devices with authentication requirements need a root of trust in the system architecture. This is particularly important for devices that can be updated over the air. In a system with TrustZone technology, code…

    • over 3 years ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • Which component set the NS bit in SCR ?

    Sahil
    Sahil

    Hi,

    I am new to the ARM TrustZone Architecture.

    I am confused that who sets the NS bit in the SCR register, is it the processor itself set bit to 1 when it enters the EL3 mode, or it is the Monitor mode code is setting the NS bit ?

    Maybe I am asking…

    • Answered
    • over 3 years ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • Platform security architecture is announced by Arm

    Diya Soubra
    Diya Soubra

    • over 2 years ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • Given an address, how to check its IDAU Security attribution information?

    Tao Lu
    Tao Lu

    From "ARM v8-M Architecture Reference Manual", about IDAU I see:

    The IDAU can provide the following Security attribution information for an address:
    • Security attribution exempt. This specifies that the address is exempt from security attribution…

    • Answered
    • over 1 year ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • A question about interrupt priority degrade

    Wenchuan2018
    Wenchuan2018

    Hi guys,

    I found in armv8-arch ref manual that when PRIS bit in the AIRCR is set, the priority of non-secure handler is mapped to the bottom of the priority range. So I did an experiment.

    I configured two exceptions, systick and svc. The priority are 2…

    • Answered
    • over 1 year ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • Development platforms, compilers for TrustZone

    Seema
    Seema

    Hello All,

    Requirements:

    1. Write a secure program where some part of the program resides in a secure zone.
    2. Code instrumentation: I would like to instrument the compiled binary that runs on the device 

    I could find some options, however, I cannot differentiate…

    • Answered
    • over 1 year ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • Architecting a more Secure world with isolation and virtualization

    Berenice Mann
    Berenice Mann

    New Secure world architecture in Armv8.4

    Arm TrustZone was introduced to the Arm architecture A-profile in 2003. At the heart of the TrustZone approach is the concept of Secure and Normal worlds that are hardware separated. Secure hardware resources are…

    • over 1 year ago
    • Processors
    • Processors blog
  • New online training course – An Introduction to Armv8-M

    Joel Eaton
    Joel Eaton

    We are very pleased to announce a new online training topic – An Introduction to Armv8-M.

    This is the latest addition to our introduction to Arm the Arm architecture series and is targeted to those new to developing on Armv8-M or those wanting a…

    • over 2 years ago
    • Processors
    • Processors blog
  • Arm Technical Training – Any time, any place

    Matt_Rushton
    Matt_Rushton

    Partner Training at Arm has been a great success over the last 15 years. It has expanded the knowledge and capabilities of our Partners’ Engineering teams by delivering classroom sessions to over 4000 attendees in 2016 alone and has helped our Partners…

    • over 2 years ago
    • Processors
    • Processors blog
  • Data abort, External abort.. How can i find cause????

    Yeo Reum Yun
    Yeo Reum Yun

    Hi, experts

    I'm developing Secure OS on A57/53 bit.LITTLE SoC. But as you know.. Cuz i'm really beginner..

    I beg your wisdom...

    Current situation is :

    • For making a TA. Bring the related data from REE and Mapping TEE side's NON-SECURE memory. (Data…
    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Whitepaper - ARMv8-M Architecture Technical Overview

    Joseph Yiu
    Joseph Yiu

    The next generation of ARM Cortex-M processors will be powered by a new architecture version called ARMv8-M architecture. This document provides a technical overview of various enhancements in the new architecture, as well as an introduction to the security…

    • Whitepaper - ARMv8-M Architecture Technical Overview.pdf
    • over 3 years ago
    • Processors
    • Processors blog