• How does the NEON access Memory?

    bearfish
    bearfish
    Note: This was originally posted on 5th May 2008 at http://forums.arm.com

    I have a question about how to get the maximum calculation capability of NEON. In our video processing application, we should access several frame video. Then if the video is HD…
    • over 6 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • Optimizing code for ARM: ARMv7, ARMv8, Memory Models and NEON Intrinsics

    Matthew Du Puy
    Matthew Du Puy

    Matthew Gretton-Dann titled this presentation: Porting & Optimising Code 32-bit to 64-bit

    The title is accurate but he does a better job of giving a high level overview of the ARMv7 and ARMv8 architecture differences, C++11 memory models (which become…

    • over 6 years ago
    • Open Source Software and Platforms
    • Android forum
  • A couple of use cases for TrustZone for ARMv8-M

    Diya Soubra
    Diya Soubra

    Root of Trust implementation – Connected devices with authentication requirements need a root of trust in the system architecture. This is particularly important for devices that can be updated over the air. In a system with TrustZone technology, code…

    • over 3 years ago
    • TrustZone for Armv8-M
    • TrustZone for Armv8-M forum
  • The Semantics of Transactions and Weak Memory in x86, Power, Arm, and C++

    Nathan Chong
    Nathan Chong

    This is the second in a two-part post from Arm Principal Researcher Dr Nathan Chong on his joint research with Tyler Sorensen (Imperial College London) and Dr John Wickerson (Research Fellow, Imperial College London), and published as a PLDI 2018 Distinguished…

    • over 1 year ago
    • Arm Research
    • Research Articles
  • Concurrent Programming, Transactions and Weak Memory

    Nathan Chong
    Nathan Chong

    This is the first in a two-part post from Arm Principal Researcher Dr Nathan Chong on his joint research with Tyler Sorensen (Imperial College London) and Dr John Wickerson (Research Fellow, Imperial College London). This research was published as a PLDI…

    • over 1 year ago
    • Arm Research
    • Research Articles
  • Memory access ordering part 3: Memory access ordering in the Arm Architecture

    Leif Lindholm
    Leif Lindholm

    In my previous posts, I have introduced the concept of memory access ordering and discussed barriers and their implementation in the Linux kernel. I chose to do it in this order because I wanted to start by communicating the underlying concepts before…

    • 1944.zip
    • over 6 years ago
    • Processors
    • Processors blog
  • Caches and Self-Modifying Code

    Jacob Bramley
    Jacob Bramley

    Ideally, caches act as some magic make-it-go-faster logic, sitting between your processor core (or cores) and your memory bank. Whilst it can be beneficial to consider specific cache features when writing some performance-critical code, it is usually…

    • clear_cache.tar.gz
    • over 6 years ago
    • Processors
    • Processors blog