A question about interrupt priority degrade
Hi guys,
I found in armv8-arch ref manual that when PRIS bit in the AIRCR is set, the priority of non-secure handler is mapped to the bottom of the priority range. So I did an experiment.
I configured two exceptions, systick and svc. The priority are 2…
- over 1 year ago
- TrustZone for Armv8-M
- TrustZone for Armv8-M forum
New online training course – An Introduction to Armv8-M
We are very pleased to announce a new online training topic – An Introduction to Armv8-M.
This is the latest addition to our introduction to Arm the Arm architecture series and is targeted to those new to developing on Armv8-M or those wanting a…
- over 2 years ago
- Processors
- Processors blog
Platform Security Architecture - PSA primer
I have been providing a high level introduction to Platform Security Architecture at the Tech Symposia in USA and Asia over the last couple of weeks. Since interest is high I thought I would share my slides so they can receive a wider audience.
The architecture…
- over 2 years ago
- Internet of Things
- Videos & Files
Platform Security Architecture – Scalable Security for the IoT
Arm releases a white paper on the Platform Security Architecture
The recent deployment of connected devices, as part of the evolution of the Internet of Things (IoT), has led to a major increase in the number of IoT-based cyber-attacks. These attacks…
- over 2 years ago
- Processors
- Processors blog