• AXI-lite tlast signal missing and tready behavioral

    hayk
    hayk

    Dear Forum,

    Can someone please clarify my 2 questions:

    a)

    Why in AXI lite protocol there is no tlast port?

    Mainly AXI lite consists of AXI-stream protocols, but there is no tlast port in AXI lite. Can someone justify what was the reason of not including…

    • over 1 year ago
    • System
    • SoC Design forum
  • In case of AXI4 lite protocol,what is the relation between BValid signal and Wvalid signal?

    Nitin Dixit
    Nitin Dixit

    In case of AXI4 lite protocol,whether BValid should be asserted before WVALID signal deassertion? what is the legal case?

    • over 2 years ago
    • System
    • SoC Design forum
  • AXI4-lite :Wready dependency on Awvalid and Wvalid

    Nitin Dixit
    Nitin Dixit

    In specification it is mentioned that WREADY signal can wait for AWVALID and WVALID signals.

    Does it mean that WREADY signal should be asserted only after assertion of AWVALID and WVALID signals.

    What is the relation between these signals?

    and performance…

    • over 2 years ago
    • System
    • SoC Design forum
  • needs some clarification

    bala devi
    bala devi

    Difference between axi_4 and axi4_alite?

    • Answered
    • over 2 years ago
    • System
    • SoC Design forum
  • Write strobe for AXI4 lite

    sandhya.moorthy
    sandhya.moorthy

    what are the possible values of strobe for a half word transfer in AXI4 lite? 

    Are these following values on WSTRB valid ?

    -1001

    -0101

    -1010

    • over 2 years ago
    • System
    • SoC Design forum
  • In read or write transaction in AXI.what happen if data transaction  is before address.

    Rajesh Pandey
    Rajesh Pandey

    HI there,

    I have question regarding transaction in AXI4 bus (or any other bus). What happens  in write any read action when data transaction (handshaking) occurs before  address  transaction (handshaking) ?

    Will the data be written to the…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-A / A-Profile forum