• PLEASE HELP ME (AMBA3 AXI)

    Cao Phi Ho
    Cao Phi Ho

    1/ WHY "the width of the ID field at a slave interface is wider than the ID field at a master

    interface"??? Can you please explain in more detail the reason???

    2/ Do AXI protocol have support "read interleaving"???

    Thanks you so much…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • AMBA3 AXI - Exclusive access

    Cao Phi Ho
    Cao Phi Ho

    1/ What will happen when a master performs 2 exclusive read with 2 different transaction ID to the sam an address location??

    Example: Master0 (M0) issue 2 exclusive read with 2 different transaction ID (first is 00 and second is 01) to the sam an address…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • AMBA 3 APB PENABLE wrt PREADY

    nahuja
    nahuja

    Hi,

       I need a clarification on PENABLE with respect to PREADY. 
       1) Can pready remain high for more than one cycle?
       2) Does PENABLE from the master has to look for PREADY going low to deassert or it should go low the cycle next to the assertion of PREADY…

    • over 2 years ago
    • System
    • SoC Design forum

  • hi. i wonder AMBA 3.0 AXI difference of data interleaving and write data interleaving

    In-Gyu.Lee
    In-Gyu.Lee

    Hi, I'm a graduate student living in south Korea. I'm studying about AMBA 3.0 AXI.

    recently, i read "AMBA® AXI Protocol.pdf". but i have two questions about AXI after reading.



    as you can see the first picture, slave send the read…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • hi. amba 3.0 axi interleaving

    In-Gyu.Lee
    In-Gyu.Lee

    I'm a graduate student living in south Korea. I'm studying about AMBA 3.0 AXI.

    recently, i read "AMBA® AXI Protocol.pdf". but i have two questions about AXI after reading.


    i wonder about interleaving and out-of order.

    AXI supports…

    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • hi. i wonder AMBA 3.0 AXI out-of order - WID & RID

    In-Gyu.Lee
    In-Gyu.Lee

    Hi, I'm a graduate student living in south Korea. I'm studying about AMBA 3.0 AXI.

    Recently, I read "AMBA AXI Protocol.pdf". but i have two questions about AXI after reading.

    Firstly, i very wonder AWID, WID and BID when write transaction…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum

  • barrier instructions Vs. barrier transactions

    zyto
    zyto

    I have several questions about barrier operarions.

    1. how to operate barrier instructions ISB, DMB, DSB in ACE?

         a) when ISB is executed, what are the signal values about barrier transaction  (AxBAR, AxSNOOP , AxDOMAIN)?

       …

    • over 6 years ago
    • System
    • Embedded forum