• Does the ThunderX CP processor support AArch32?

    cbowen
    cbowen

    It's my understanding that AArch64 is supposed to be backward compatible with AArch32, at least that is what the documentation says. But, I found one (1) page at https://en.wikichip.org/wiki/cavium/thunderx that says the ThunderX processors do not support…

    • 10 months ago
    • Processors
    • Cortex-A / A-Profile forum
  • Help converting neon 32-bit syntax to 64-bit

    lefty
    lefty

    Hi,

    I am trying to translate a function from Neon 32-bit syntax to 64-bit. Unfortunately, I had trouble understanding the documentation

    For instance, an example is this line:

    vld1.32         {q0}, [%[src1]]!

    translates…

    • Answered
    • over 4 years ago
    • Software Tools
    • Arm Compilers forum
  • How to do the ARM state change between 64-bit and 32-bit?

    Prasad
    Prasad

    Hi,

    The latest 64-bit architecture can on both AArch64 and AArch32 state.

    Can someone tell me how to utilize this feature so that I can seamlessly integrate algorithms (which are optimized with 32-bit and 64-bit instructions) with applications which are…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • In aarch32 state, what is the mechanism to switch to aarch64 in software?

    cray
    cray

    Dear sirs,

    I'm reading arm v8a specification. I found that when arm is in aarch32 state, only a few exceptions can switch to aarch64 depending on the configuration in the registers. the exceptions are as follows.

    abort, physical async abort, physical…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Why does FPU performance differ in AArch64 and AArch32 with Cortex-A53?

    Yasuhiko Koumoto
    Yasuhiko Koumoto

    Hello experts,


    I have come to having a question.
    VFP Benchmark is a benchmark application which was made by a certain Japanese in order to measure ARM VFP performance especially for ARMv7-A and ARMv8-A.
    The software can be downloaded from the following link…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Is First-level table skippable? (VMSA)

    Jongseok Kim
    Jongseok Kim

    Hi forks. I am a newbie engineer for arm-processor and I have a question about VMSAv7-32.

    According to ARMv8 architecture manual, page 3592: arm processor can skip first level table if a first level table would contain only one entry..

    How arm processor…

    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • indicator for A core system timer implemented or not

    hostia
    hostia

    Hi ARM expert,

        In ARM V7 RM, I saw "This chapter describes the implementation of the ARM Generic Timer as an OPTIONAL extension to an ARMv7-A or ARMv7-R processor implementation.". So, I think it means that a SoC implementation…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Why in A64 the coprocessor is removed?

    Victor
    Victor

    For the view of architecture, why the coprocessor is removed for A64 instruction set?

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Reset Management Register Functioanlity in ARM v8

    techguyz
    techguyz

    Hi Experts,

    Does the Reset Management Register will be implemented mandatory or optional for the SoC based on ARMv8 and how it is practically used ?

    Regards,

    Techguyz

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Hypervisor to experiment

    techguyz
    techguyz

    Hi Experts,

    Which of the open source hypervisor like Qemu,Xen,etc is easy to start and experiment the code.

    Is there anything which ARM supports in specific where it is more handy on ARM processors.

    Also am new bee to this hypervisor concepts so bit curious…

    • Answered
    • over 5 years ago
    • System
    • Embedded forum
  • Affordable arm tools for Assembly or C code for ARM-32 and 64

    br-dev
    br-dev

    Hi,  i am developing allways opensource code as home hobbies. I have a mac OS and  many ARM cortex mainly on RPBI. I use to code GCC but i am now going to SIMD and i am thinking to have a proper dev env. what could you suggest. I can invest in a NUC for…

    • over 1 year ago
    • Open Source Software and Platforms
    • Arm Development Platforms forum
  • How to use Cortex-a53 FVP for AArch32 platform in DS-5?

    ldivya47
    ldivya47

    Hi all,
    I have downloaded Cortex-A53 FVP (Version-10.2). I am able to run code on AArch64 platform in DS-5 simulator. How to use this Cortex-A53 FVP to run on AArch32 ? What are the required settings for this? Can anyone help me on this.

    Thanks,
    Divya.

    …
    • Answered
    • over 3 years ago
    • System
    • Embedded forum
  • How to run AArch32 code in DS-5 AArch64?

    ldivya47
    ldivya47

    Hi,

    I installed DS-5 64-bit version in windows, but i received 32-bit code which is running on AArch32 without any issue , and it's not running on my machine with AArch64 DS-5, is there any setting which i can do to run the same code without any changes…

    • Answered
    • over 3 years ago
    • Software Tools
    • Arm Development Studio forum
  • Cache Allocation Technology

    sarbojit
    sarbojit

    Hi guys,

    I have a question regarding "Cache allocation technology" that is present in Broadwell processors of Intel. Does ARM (aarch32/aarch64) support similar way of partitioning the LLC for a process to access?

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • To run library functions on arm a53 core

    Sagar K
    Sagar K

    Hello experts,
    I am working on a53 core in which I am not able to run string library functions like memset, memcpy etc. I have included the string.h library also but it is generation an exception. The same code works on the a15 core without any modification…

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Confusion about exception level of ARMv8

    Xinwei
    Xinwei

    Hi,

    I am fairly new to ARM processor and start work with cortexA57 recently.  After reading the technical manual and programmer guide , I have some questions regarding the exception level of v8.

    1. How does the exception level change from one to…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • A question about the access flag fault

    zhaoshijun
    zhaoshijun

    Hi, everyone.

     

    The CPU will receive a access flag fault if we set the access flag = 0. My question is  if we always set the access flag to be zero in the fault handler, does the CPU get the value in the memory? For example, the instruction "ldr rd, address…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Accelerating open source LLVM development

    Leandro Nunes
    Leandro Nunes

    Arm today announces that it is supporting the open source LLVM community through the provision of a build bot and build cache that targets the Arm architecture. This allows LLVM developers to locate and fix build and test failures more rapidly.

    What is…

    • over 1 year ago
    • Software Tools
    • Tools, Software and IDEs blog
  • How to access the system control register?

    aketh
    aketh

    Hi all,

    I am trying to access the system control register in my ARM C program. The code (with heading 64 bit) I used is presented below. However I got the following error message during compilation.

    /tmp/cc7Dc236.s: Assembler messages:
    /tmp/cc7Dc236.s:31…

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Armv8-A architecture: 2016 additions

    David Brash
    David Brash

    The Armv8-A architecture continues to evolve, with the additions developed through 2016 collectively known as Armv8.3-A. Grouping enhancements in this manner helps the ecosystem manage tools and software support alongside the large numbers of Armv8-A…

    • over 4 years ago
    • Processors
    • Processors blog
  • ARM cortext A53 Physical Address Flush

    m0sf3tz
    m0sf3tz

    Since ARM caches are physically indexed is there any way to flush based on the PA? I know I can get the set, but what about the way? If I am flushing from L1 would I have to flush all ways in L1 and then L2 assuming there is no L3 to get to system memory…

    • Answered
    • over 2 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • aarch64 kernel using aarch32 page tables

    Vincent Siles
    Vincent Siles

    Hi !

    I'm trying to update my custom kernel, working with short or long descriptor in armv7a to a target supporting armv8.

    My current setup uses TTBR0 to point to the PL0 page table and TTBR1 to point to the PL1 page table.

    At the moment, I sometimes…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Porting code from Cortex-A9 to Cortex-A57

    Ajeesh
    Ajeesh

    Hi,

    I have been using I.MX6Q Sabre sd board (cortex-a9 ). I build image with my own start script and ld script. The image was loaded with u-boot. Now i would like to do the Same with Renesas R-Car M3(cortex A-57). How would i go about this? Can i use the…

    • Answered
    • over 3 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Is it possible to implement EL3 AArch64 and change it later to EL3 AArch32?

    유영현
    유영현

    I was reading the ARM architecture reference manual... and thought

    Is it possible to implement EL3 AArch64 and change it later to EL3 AArch32?

    How to change is...

    If I start on cold reset, it will start at EL3 AArch64.

    Right after the cold reset, I set the…

    • over 4 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Linaro Kernel that AArch32 applications run in EL0

    Manabu Nakamura
    Manabu Nakamura

    Hello everyone.

    Would you let me know how to build Linaro Kernel that AArch32 applications run in EL0?

    I'm trying to build Linaro Kernel while seeing the following site.

    http://releases.linaro.org/latest/openembedded/juno-lsk

    I would like to build Linaro…

    • Answered
    • over 6 years ago
    • Software Tools
    • Arm Development Studio forum
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