Hello Community,

in our current ASIC project we have to replace an ARM926EJ-S with a Cortex-A5.

In the moment we are facing the following problem in our bootloader:

We intend to use the high exception vectors after reset (input vinithi is tied fix to '1…

Just in case someone needs them, I made ARM and Thumb mode lists of Cortex-A7 instructions (because I didn't find them in the net).

They are generated from ARMv7-A/R ARM with a simple AWK-script and then edited, so they may contain errors.

The lists…

Does anyone know if there is a list of ARM instruction set pseudo instructions?

Or better yet, an instruction list like PPC's, where there is a list of 'true instructions' with mnemonics and

another list of "simplified mnemonics" (=pseudo instructions…

Now that the funny PABT-behaviour is found to be (probably) caused ny debug state, I'd like to exit debug state before return from PABT exception. The ARM v7-A/R ARM says that I should write RRQ to DBGDRCR, but it seems that in Cortex-A7 it's not accessible…