• ACE protocol : Eviction and snoop request at same time

    Chakri Myneni
    Chakri Myneni

    How to handle below scenario ?

    • At time t1 let us suppose L1 data cache is evicting a line and write address is sent on write address channel by asserting AWVALID (AWREADY is high)
    • At same time t1, there is a snoop request from interconnect on snoop address…
    • Answered
    • over 1 year ago
    • System
    • SoC Design forum
  • AMBA AXI CACHE

    srp
    srp

    i am not able to understand working of this CACHE signal pleas explain with simple example.

    thank you!

    • over 2 years ago
    • System
    • Embedded forum
  • Cache Maintenance Transactions

    Taniya Garg
    Taniya Garg

    Hi,

    I am reading ACE protocol and i am confused about when to use cache maintenance transactions. On what basis should i decide when to use cache maintenance transaction and which transaction to be used?

    Can anyone please help?

    • over 1 year ago
    • System
    • Embedded forum
  • How to handle Cache flush in ACE?

    Taniya Garg
    Taniya Garg

    Hi,

    I want to know which transaction should be issued by ACE interface on the channel when a flush/clean request is being processed by the cache?

    Can anyone please help.

    Regards,

    Taniya Garg

    • over 1 year ago
    • System
    • Embedded forum
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