Hi,

It looks like when using a transfer size of one Byte, the position of this data on the 32-Bit bus must be set via ADDRESS[1:0]. This means that for a Byte transfer, the addressable space is reduced, from 4GB (2^32) to 2^(30) = 1GB. Is this correct…

Hi Team,
I'm new to the hardware programming world and was wondering if any of you could point me to the relevant resources.
To be more specific, in course of my learning, i have to program pl080 DMAC in order to enable mem to mem / periferal to mem…

Hi All,

I m programming a linux device driver for custom IP, the SoC has ARM PL081 DMA controller. The custom-IP is mapped to request line 3 of PL081. below is the slave configuration.

struct dma_slave_config rx_conf = {
	.src_addr = hsrx_local->phy_rx_addr…

Hi,

Facing the issue:
"MBERROR :  AHB Master bus error status, set when the AHB Master encounters a bus error response from a slave"

Here is the Inputs:

We are using the custom SOC, in which we are testing the CLCD controller(IP ARM PL111)
connected…

Hello,

 what are the additional features added or removed in AHB lite;

regards

Pavan