Hello, experts:
My platform has a Cortex-A9 MPCore CPU, It supports trustzone tech.
I tried to change NSACR.TL bit, but It needs to change in the secure state.
I checked NSACR value in non-secure state and NSACR value that I changed is changed aperiodically…
This I.MX6 solox has a Arm Cortex-A9 processor.
What I am trying to do is Tracing PTM which will be stacked up in the ETB buffer.
I also used Zynq 7000 zc706 which has two Arm Cortex-A9 processors…