• why there are separate registers for interrupt set-enable and clear-enable while can be just one

    Morteza
    Morteza

    I can't understand why there are separate registers like Interrupt Set-Enable and Clear-Enable Registers or Interrupt Set-Pending and Clear-Pending Register in NVIC? these dual registers couldn't be handled in just one? what are the reasons that ARM processors…

    • Answered
    • 1 month ago
    • Processors
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  • How to Generate Exceptions on Cortex M3?

    aaerciyas
    aaerciyas

    Hi all,

    I am trying to generate exceptions like Bus Fault, Usage Fault on ARM Cortex-M3. My code for enable exceptions:

    void EnableExceptions(void)
    {
    	UINT32 uReg = SCB->SHCSR;
    
        uReg |= 0x00070000;
    
        SCB->SHCSR = uReg;
    
        //Set Configurable…

    • 4 months ago
    • Processors
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  • Global variable initialisation problem

    Maitland
    Maitland

    Is this a bug?

    //in global scope:

    uint32_t a = 0;

    uint32_t b = 1 

    // in main():

    printf( "%d %d", a, b);

    Output is -1472002 1.

    i.e. variable not initialised if it is explicitly set to zero.

    version  9-2020-q2-update) 9.3.1 20200408., target STM32F103…

    • 5 months ago
    • Processors
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  • Hard fault in STM32F101RF due to MRC2 Disassembly ??!!

    Vish_
    Vish_

    Hi all,

    I am having a bootloader code wherein I will sending/receiving data via USART . I have configured USART to operate in interrupt mode.

    USART functionality works perfectly fine independently. Verified this with multiple read/write instances.

    When…

    • 7 months ago
    • Processors
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  • Cycle accurate Cortex-M3 simulator using obsfucated RTL

    EBB
    EBB

    I stumbled upon this page which brought up some questions:

    https://developer.arm.com/tools-and-software/simulation-models/cycle-models/designstart

    The obsfucated RTL is synthesizable and should be cycle accurate. I don't see any technical reasons why…

    • over 1 year ago
    • Processors
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  • Problem with frequency on STM32F103C8T6

    TechnoMan
    TechnoMan

    Hello!
    Found a very strange problem with STM32F103C8T6. When executing this program, if you remove the CountDigit () function, then the delay function works correctly, i.e. Delay (1000) makes a delay of about 1 second. But if you execute the CountDigit…

    • over 1 year ago
    • Processors
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  • Character recognition using NXP LPC1768 (Cortex-M3)

    Tzan_IT
    Tzan_IT

    Hello guys.

    I have a project on handwritten character recognition using a landTiger NXP LPC1768 ARM Cortex M3 board using touchscreen and so on.

    My experience in such kind of projects or programming is limited but I am willing to put the effort to do…

    • Answered
    • over 1 year ago
    • Processors
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  • ARM Cortex-M3 floating point...

    dtvonly dtvonly
    dtvonly dtvonly
    Note: This was originally posted on 9th May 2008 at http://forums.arm.com

    Hi.  Are there any floating point support for the ARM CORTEX-M3?
    • over 7 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • Abort some questions of arm interrupt

    josh zhao
    josh zhao
    Note: This was originally posted on 20th June 2008 at http://forums.arm.com

    I try to understand arm interrupt,there are some questions I don't know,
      1.   Why the nested interrupt has to switch out of irq mode to svc mode?  I think  it only pushes…
    • over 7 years ago
    • Processors
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  • Cortex M3 compilers and benchmarks

    Andrey Madan
    Andrey Madan
    Note: This was originally posted on 20th January 2009 at http://forums.arm.com

    Please help me identify the best compiler for CortexM3.
    I currently use armcc from ARM, but curious if that is the best option on the market. So far, I found a couple of options…
    • over 7 years ago
    • Processors
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  • Shortest code for memory to memory transfer

    subin t
    subin t
    Note: This was originally posted on 16th March 2009 at http://forums.arm.com

    Hi All,
        Can anyone tell me what is the shortest code I can use for cortex M3 to transfer (a few words) from one memory location to other(without using the DMA).  It should…
    • over 7 years ago
    • Processors
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  • What is the general purpose register number for LR in Cortex M3

    Umut Umut
    Umut Umut
    Note: This was originally posted on 25th March 2009 at http://forums.arm.com

    Note: Topic title is not valid. It should be "What is the general purpose register number for FP in Cortex M3"

    I would like to know which general purpose register is…
    • over 7 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • Precise Memory Error

    Susan Davies
    Susan Davies
    Note: This was originally posted on 3rd August 2010 at http://forums.arm.com

    I am working with a Cortex-m3 using assembler and am getting "precise memory errors".  The manuals refer to this fault a lot, but don't actually explain what it IS and how to…
    • over 7 years ago
    • Processors
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  • Question : The Definitive Guide to the ARM Cortex-M3

    Kenichi Kenichi
    Kenichi Kenichi
    Note: This was originally posted on 11th December 2007 at http://forums.arm.com

    Dear, all.

    I am new in this forum.
    Recently I studying Cortex-M3 core, so I bought book "The Definitive Guide to the ARM Cortex-M3" by Joseph Yiu.
    This book is very…
    • over 7 years ago
    • Processors
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  • Cortex-M3 Hard Fault - find cause?!?!?!?

    Tim Borland
    Tim Borland

    Hello all,

    I'm new to the ARM platform and I'm having a problem discovering why my code is generating a Hard Fault.

    My hardware is an mbed platform board with the NXP LPC1768 processor.

    The code in question works when compiled using the mbed…

    • Answered
    • over 7 years ago
    • Processors
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  • I want to know priority of Cortex-M3 processor

    kyujin
    kyujin

    which interrrupt priority is higher?

    systick vs IRQ(external timer)

    because In my case externl timer is higher then systick.

    I saw that during processing in systick ISR, but  suddenly pc jump to timer ISR

    so  I experimented print out. systick print letter…

    • Answered
    • over 7 years ago
    • Processors
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  • Cortex-M3: Are "Errata Notice" and "Software developers Errata Notice" the same?

    J K
    J K

    Im wondering if these documents are different types:

    1. Errat Notice, PR141-PRDC-007452, v9.0, 2008

    2. Software developers Errata Notice, ARM-EPM-039114, v2.0, 2014

    From my point of view, these documents are the "same" (of course in another revision).…

    • Answered
    • over 5 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • Cortex M3 - Literal-pool vs MOVW-MOVT when cache is present

    Remi DUCLOS
    Remi DUCLOS

    This question is a kind of survey:

    Hi folks,

    I know this subject, or almost the same, has already be presented, but I don't found an appropriate answer.

    First, a short reminder

    The Cortex-M3 instruction set offers three ways to load a 32-bit literal…

    • Answered
    • over 5 years ago
    • Processors
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  • Yet another processor crash!

    Chris Williams
    Chris Williams

    Yes, my ARM cortex M3 is crashing, whats new?

    Well, after 3 weeks of debug  I am no closer to an answer, so I hope you will not mind if I list what I have tried and see if anybody has a flash of inspiration?

    The setup:

    Bare bones LPC1788 ARM Cortex…

    • over 5 years ago
    • Processors
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  • ARM : LPC2148 Registers and programming examples

    Satya Prakash Prasad
    Satya Prakash Prasad

    I am a beginner in using ARM LPC2148 MCU for project purpose. I searched for details about tutorials, example set, registers details of MCU but could not find much.

    Please let me know site that would be useful for me to avail the datasheet, examples and…

    • Answered
    • over 6 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • "Dormant Mode" for Cortex M3/M4

    Steven Dennis
    Steven Dennis

    Hi,

    We are interested in minimizing startup time from deep sleep mode.

    Some of the older ARM cores implement a dormant mode whereby the CPU core context (state) is written to RAM prior powering it down, and then then restored after the CPU core  is powered…

    • over 4 years ago
    • Processors
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  • Cortex-M3: What happen to the stack pointer (sp) when setting VTOR?

    J K
    J K

    The first entry of the vector-table is the initial value for the stack-pointer.

    I'm asking me, will the stack-pointer be changed when VTOR was set?

    Thanks for any help! :-)

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • LPC1837 Backup Registers

    Jonathan Barnett
    Jonathan Barnett

    The processor has 64 registers (256 bytes) in the RTC power domain

    I am using these registers to store temporary data which then gets committed to flash at the end of a transaction.

    I can read / write data ok but am getting some odd reads at times.

    The Datasheet…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • real time digital signal processing and its performance analysis

    Xingjun
    Xingjun

    Hi, Everyone.

    I am working a on project that requires the use of LM3S8962 evaluation board and keil uvision compiler.

    I need to program fft in c algorithm and allow my micro-controller board to process it.

    I have the fft algorithm. I not too sure my fft…

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-M / M-Profile forum
  • Cortex M3 peripheral Bit Banding limit?

    H van Rooyen
    H van Rooyen

    Is there an intrinsic limit to the width of the bit banding for peripherals for the

    Cortex M3?

    EFM32 Giant Gecko seems to have a limit of eight bits - bits 8 to 31 does not seem to work.

    Is this normal?

    • Answered
    • over 4 years ago
    • Processors
    • Cortex-M / M-Profile forum
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