Hi,
Arm documentation "ARM Security Technology Building a Secure System using TrustZone Technology" says: The mechanisms by which the physical processor can enter monitor mode from the Normal world are tightly controlled, and are all viewed as…
TrustZone Controller in FVP Cortex57-A Base platform
Hi,
I start to learn and program TZC-400 in FVP Cortext57-A Base platform with DS-5, and encounter something that I don't understand.
I start the FVP as non-secure mode by using the paramter "bp.secure_memory = false". Then I poll TZC's gate_keeper…
- over 3 years ago
- Processors
- Cortex-A / A-Profile forum