Hi !
I am writing assembly code for some ARMv7a and ARMv8a CPU. I know that code has to be 4 bytes aligned, but I saw in several places (uboot/linux) the ".align 4" GCC directive, which will align to 2**4 = 16 bytes.
When writing code that will…
Hi !
I am writing assembly code for some ARMv7a and ARMv8a CPU. I know that code has to be 4 bytes aligned, but I saw in several places (uboot/linux) the ".align 4" GCC directive, which will align to 2**4 = 16 bytes.
When writing code that will…
Is there something special in the instructions ADD (SP plus register, ARM) and SUB (SP minus register)?
I didn't find anything different from the basic ADD (register) and SUB (register) except the documentation:
<Rd> The destination register…
Hi,
When I read about Thumb2 instructions, I have such a question: How many states for a Coretx A8? I know it has ARM and Thumb states. Thumb2 instruction is belong to Thumb state? Then does A8 have a pure Thumb instruction besides Thumb2 set?
Thanks,
Hi,
When I read the following on ARM website, I don't understand the first line. When I change ITTE to TE (as 'IT can be omitted"), the assembler complains an error of this line.
Could you explain it to me?
Thanks,
ITTE NE ; IT can be omit…