Partial register dependency neon

doofenstein

I'm having trouble finding any informations on partial neon register dependencies.

Take for example the following code:

ld2 {v0.16b, v1.16b}[0], [x0]
ld2 {v0.16b, v1.16b}[1], [x1]
ld2 {v0.16b, v1.16b}[2], [x2]
...

Does the second load have to wait…

6 months ago
Processors
Cortex-A / A-Profile forum

ARM_V8 instruction Cycles timings

ranjithkumar ds

Hi, can anyone suggest me how to know the instructions cycle timing of the arm_v8 instructions.does it take more cycles to transmit from neon to basic arm instructions in arm_v8.

please suggest me how to calculate instruction cycles in arm_v8

over 5 years ago
Processors
Cortex-A / A-Profile forum