• Minimum MMU table size on ARMv8 to map 4GB memory space, in AArch64 mode

    yifanfeng
    yifanfeng

    On ARMv7 Cortex-A8/9/7, to map 4GB memory space, the minimum MMU table size is 16 KB(section mapping). Any possible to map 4 GB memory space with 16 KB MMU table, on ARMv8, AArch64 mode?

    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
  • Is First-level table skippable? (VMSA)

    Jongseok Kim
    Jongseok Kim

    Hi forks. I am a newbie engineer for arm-processor and I have a question about VMSAv7-32.

    According to ARMv8 architecture manual, page 3592: arm processor can skip first level table if a first level table would contain only one entry..

    How arm processor…

    • over 5 years ago
    • Processors
    • Cortex-A / A-Profile forum
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