Can you explain why you propose having two cores in your CoreLink SSE-200?

This question was raised in the ' How to implement a secure IoT system on ARMv8-M ' webinar, view all the questions in the round up blog post .
Can you explain why you propose having two cores in your CoreLink SSE-200?

This question was raised in the ' How to implement a secure IoT system on ARMv8-M ' webinar, view all the questions in the round up blog post .
sse-200 instruction cache replacement policy

I'm using a Musca-A1 board and looking through the documentation and the documentation of the Corelink SS2-200 I could not find any information regarding the instruction cache replacement policy... Can...
sse-200 instruction cache replacement policy

I'm using a Musca-A1 board and looking through the documentation and the documentation of the Corelink SS2-200 I could not find any information regarding the instruction cache replacement policy... Can...
How to get GDS from an ARM IP (eg. SSE-200)

I'm new to the community and need to understand the flow to generate GDS2. There are ARM IPs available like Corstone-201 which is a bundle of sub-system IPs (like SSE-200 , etc.). This has docs, Synthesizable...