Question related to Phases in APB

Hi All, In APB, There are two phases. SETUP and ACCESS. The ACCESS phase is indicated by assertion of PENABLE signal. My question is why we require this phases ?? The signal PENABLE can be driven...
Question related to Phases in APB

Hi All, In APB, There are two phases. SETUP and ACCESS. The ACCESS phase is indicated by assertion of PENABLE signal. My question is why we require this phases ?? The signal PENABLE can be driven...
In APB, Why do we use enable signal? (Don't care about PREADY)

What if we use PSEL for enabling slave instead of using PENABLE? (for decreasing 1 step when writing data) Or How about setting PENABLE High tie? If we don't need wait states (Don't care about PREADY...
In APB, Why do we use enable signal? (Don't care about PREADY)

What if we use PSEL for enabling slave instead of using PENABLE? (for decreasing 1 step when writing data) Or How about setting PENABLE High tie? If we don't need wait states (Don't care about PREADY...
MicroLIB advantages and limitations?

In the Target-Options dialogue there is the possibility to use MicroLIB . Unfortunately I was unable to find details about this LIB. Can anybody tell what the main advantages of this lib are and what...