In APB, Why do we use enable signal? (Don't care about PREADY)

What if we use PSEL for enabling slave instead of using PENABLE? (for decreasing 1 step when writing data) Or How about setting PENABLE High tie? If we don't need wait states (Don't care about PREADY...
In APB, Why do we use enable signal? (Don't care about PREADY)

What if we use PSEL for enabling slave instead of using PENABLE? (for decreasing 1 step when writing data) Or How about setting PENABLE High tie? If we don't need wait states (Don't care about PREADY...
AMBA 3 APB PENABLE wrt PREADY

Hi, I need a clarification on PENABLE with respect to PREADY. 1) Can pready remain high for more than one cycle? 2) Does PENABLE from the master has to look for PREADY going low to deassert or it...
AMBA 3 APB PENABLE wrt PREADY

Hi, I need a clarification on PENABLE with respect to PREADY. 1) Can pready remain high for more than one cycle? 2) Does PENABLE from the master has to look for PREADY going low to deassert or it...
How to trigger a Lisa+ model behaviour through a slave port <signal>?

Hello, I am developing the model of a block for a virtual platform using Lisa+. I know how to trigger a behaviour through read and write accesses on the PVBus. However I don't know how to do that...