Removing wear-leveling

Hi, I'm using a nx2lp-Flex USB controller to develop a mass storage USB token. This chip is 8051 based. Cypress provides source code to implement a classical USB key with a Nand Flash memory...
Removing wear-leveling

Hi, I'm using a nx2lp-Flex USB controller to develop a mass storage USB token. This chip is 8051 based. Cypress provides source code to implement a classical USB key with a Nand Flash memory...
wear are the clases?

im tryin to see the header with cout in. i looked in keil and c51 and uv3. i can not see it? wear is it?
wear are the clases?

im tryin to see the header with cout in. i looked in keil and c51 and uv3. i can not see it? wear is it?
RL-FlashFS Wear Leveling, powerfail safety

Hi. I'm considering to use the ARM-RL for development on a STM32 Cortex M3 CPU and has been looking at the RL-FlashFS and is wondering if it supports wear leveling and if it is 100% safe concerning...