• STM32F746 : PLL not ready forever.
    Hello, I am trying to enable internal clock ( HSI ) in stm32f746. But when I debug code, I find that pll ready bit of RCC's CR register is not set. Following part of code always return HAL_TIMEOUT...
  • STM32F746 : PLL not ready forever.
    Hello, I am trying to enable internal clock ( HSI ) in stm32f746. But when I debug code, I find that pll ready bit of RCC's CR register is not set. Following part of code always return HAL_TIMEOUT...
  • MCB2300 pll settings?
    Looking at lpc2300.s from the RTX_blinky for example, it looks like cclk would end up running at 24mhz. Am I interpreting this correctly, and if so, why is it set so slow? Dave
  • MCB2300 pll settings?
    Looking at lpc2300.s from the RTX_blinky for example, it looks like cclk would end up running at 24mhz. Am I interpreting this correctly, and if so, why is it set so slow? Dave
  • problem in pll settings
    hello I am currently working on a project which has 20 Mhz osc. I am using LPC2368 I want CCLK should me 48Mhz Can anybody please explain me configuration required for pll registers. I have gone...