How to set interrupt priorities in CMSIS-RTOS RTX?

I have a question about the correct setting of the Cortex-M interrupt priorities in CMSIS-RTOS RTX. The CMSIS-RTX online manual (for the latest version 4.78) does not talk about this issue, and in fact...
How to set interrupt priorities in CMSIS-RTOS RTX?

I have a question about the correct setting of the Cortex-M interrupt priorities in CMSIS-RTOS RTX. The CMSIS-RTX online manual (for the latest version 4.78) does not talk about this issue, and in fact...
CMSIS RTOS priority levels

I've been looking through some details about porting code from Keil's RTX (RL-ARM) to CMSIS_RTOS RTX. In particular Appnote #264 looks appropriate to that. I see that whereas the RL-ARM RTX allows...
CMSIS RTOS priority levels

I've been looking through some details about porting code from Keil's RTX (RL-ARM) to CMSIS_RTOS RTX. In particular Appnote #264 looks appropriate to that. I see that whereas the RL-ARM RTX allows...
why have CMSIS RTOS only 7 priority?

CMSIS RTOS only have 7 priority this is the defintion : enum osPriority { osPriorityIdle = -3, osPriorityLow = -2, osPriorityBelowNormal = -1, osPriorityNormal = 0, osPriorityAboveNormal = +1...