Reorganising C code to be optimal for Thumb-1 (Cortex M0+) Instruction-Set

I have spent the last few months re-re-re-rewriting the DCT32 portion of my fixed-point MP3 decoder in a manner that avoids the need to use a stack-frame. I'm still not QUITE there but I think it is interesting...
Reorganising C code to be optimal for Thumb-1 (Cortex M0+) Instruction-Set

I have spent the last few months re-re-re-rewriting the DCT32 portion of my fixed-point MP3 decoder in a manner that avoids the need to use a stack-frame. I'm still not QUITE there but I think it is interesting...
code is not working for optimization setting O2 and O3 for Arch64bit Cortex-A53 process

I come across strange issue with Optimization setting O2 and O3 option my code will not work due to PC corruption, with O1 and O0 code woke fine, our target procesor is Arch64bit Cortex-A53. how to fix...
code is not working for optimization setting O2 and O3 for Arch64bit Cortex-A53 process

I come across strange issue with Optimization setting O2 and O3 option my code will not work due to PC corruption, with O1 and O0 code woke fine, our target procesor is Arch64bit Cortex-A53. how to fix...
Optimizer removes ssub16 used to set GE flags

Note: This was originally posted on 27th April 2009 at http://forums.arm.com I'm using RVCT 3.0 compiler with the optimizer (e.g., -O3). My code has inline assembly. Here's my problem: If the inline assembly...