• Can we run the Cortex-A53 cores at different clock speeds ?
    Dear ARM Group, Can we run the A53 cores at different clock speeds? if YES,  How does it effect the complete A53 (L2 cache etc) and system? if NO,  What are the constraints ? could you please give a detailed...
  • Can we run the Cortex-A53 cores at different clock speeds ?
    Dear ARM Group, Can we run the A53 cores at different clock speeds? if YES,  How does it effect the complete A53 (L2 cache etc) and system? if NO,  What are the constraints ? could you please give a detailed...
  • Cortex-A7 structure can support max to 4 cores, I want ask the 4 cores have 4 part copy of the registers(37 registers * 4)?
    Cortex-A7 structure can support max to 4 cores, I want ask the 4 cores have 4 part copy of the registers(37 registers * 4)? In other words, each core have the same 37 registers or the 4 cores share the...
  • Cortex-A7 structure can support max to 4 cores, I want ask the 4 cores have 4 part copy of the registers(37 registers * 4)?
    Cortex-A7 structure can support max to 4 cores, I want ask the 4 cores have 4 part copy of the registers(37 registers * 4)? In other words, each core have the same 37 registers or the 4 cores share the...
  • Anyone knows how to set the core clock at 120MHz with keil on the FRDM-K64F?
    I try with this code   MCG -> C1 = 0x2AU;   MCG -> C2 = 0x20U;   MCG -> C4 = 0x00U;   MCG -> C5 = 0x09U;   MCG -> C6 = 0x58U;   MCG -> SC = 0x00U;   OSC -> CR = 0x80;   SIM -> SOPT1 = 0x000C0000UL;  ...