[armv8][cortex-a72] why must flush data cache when I tried to map a SRAM area?

I tried to map a SRAM area, I add that area (from 0x700000000 to 0x70FFFFFF) to page table and set Memory Attribute Indirection Register as normal memory and cacheable. But when I try to read thar area...
Mapping external SRAM memory

Hello everybody. I have a little doubt that I would like to ask you. I am trying to map a 64KB external SRAM memory in 16bit multiplexed bus mode in my XC164CS microcontroller. In keil compiler, at...
Mapping external SRAM memory

Hello everybody. I have a little doubt that I would like to ask you. I am trying to map a 64KB external SRAM memory in 16bit multiplexed bus mode in my XC164CS microcontroller. In keil compiler, at...
LPC4357 on-chip SRAM mapping

Hi I'm working on LPC4357 and I have problem to use all of internal SRAM. LPC4357 has 3 part of memory space for SRAM: 1. form 0x10000000 --> 32KB 2. from 0x10080000 --> 32KB + 8KB 3. from...
LPC4357 on-chip SRAM mapping

Hi I'm working on LPC4357 and I have problem to use all of internal SRAM. LPC4357 has 3 part of memory space for SRAM: 1. form 0x10000000 --> 32KB 2. from 0x10080000 --> 32KB + 8KB 3. from...