Disturbing UART RXNE/IDLE during automatic window update

This week I needed several days to find a very obscure UART "bug" in STM32F4. The RXNE and IDLE flags sometimes just disappeared (were reset to zero). The missing RXNE then leaded to a missing byte from...
Disturbing UART RXNE/IDLE during automatic window update

This week I needed several days to find a very obscure UART "bug" in STM32F4. The RXNE and IDLE flags sometimes just disappeared (were reset to zero). The missing RXNE then leaded to a missing byte from...
How to do hardware reset automatically before flash download?

Hello Everyone, I came across keil flash download failure issue because of the watchdog. The watchdog will reset the chip during the process of flash download. And the watchdog can be disabled by...
How to do hardware reset automatically before flash download?

Hello Everyone, I came across keil flash download failure issue because of the watchdog. The watchdog will reset the chip during the process of flash download. And the watchdog can be disabled by...
Status flags during bit-level operations

I can understand that during ANL or ORL operations at bit level, there won't be any change with the status flags of the PSW. However, if a CPL or CLR or SETB operation is performed on one of the...