problem in pll settings

hello I am currently working on a project which has 20 Mhz osc. I am using LPC2368 I want CCLK should me 48Mhz Can anybody please explain me configuration required for pll registers. I have gone...
problem in pll settings

hello I am currently working on a project which has 20 Mhz osc. I am using LPC2368 I want CCLK should me 48Mhz Can anybody please explain me configuration required for pll registers. I have gone...
problem with PLL values choosing for LPC2939 (or LPC29xx)

problem with PLL values choosing for LPC2939 (or LPC29xx) could anybody give me an example for following steps?? i want 125MHz in Fclkout Values of the dividers are chosen with the following process...
problem with PLL values choosing for LPC2939 (or LPC29xx)

problem with PLL values choosing for LPC2939 (or LPC29xx) could anybody give me an example for following steps?? i want 125MHz in Fclkout Values of the dividers are chosen with the following process...
PLL,UART

I am new to keil,just give me some basic idea about initilizations involved.