Hard Faults and MemManage Faults in Cortex m3/m4

I wrote a simple program, where I am writing to an illegal memory location. Writing in an illegal Memory location generates a MemManage fault. And if MemManage is not enabled, HardFault in generated....
Hard Faults and MemManage Faults in Cortex m3/m4

I wrote a simple program, where I am writing to an illegal memory location. Writing in an illegal Memory location generates a MemManage fault. And if MemManage is not enabled, HardFault in generated....
ARM Cortex-M3 MemManage exception for mpu

// mpu test #include "stm32.h" #include "type.h" extern u32 mpu_reg1_begin_; extern u32 mpu_reg1_end_; __attribute__ ((section (".mpu_r1"))) int reg1[256]; bool init_mpu(); // ref: http://blog.feabhas...
ARM Cortex-M3 MemManage exception for mpu

// mpu test #include "stm32.h" #include "type.h" extern u32 mpu_reg1_begin_; extern u32 mpu_reg1_end_; __attribute__ ((section (".mpu_r1"))) int reg1[256]; bool init_mpu(); // ref: http://blog.feabhas...
why Foundation Model can not produce Address size fault，Translation fault， Access flag fault？

Hi， I want to produce an exception in Foundation Model to test my ARMV8 U-boot. But when I set AF bit to 0 in last level page table entry, and want to produce an Access Flag exception, it failed...