EFFECT OF INBUILT OPTIMIZATION LEVELS IN CX51

Hi all, I am using Keil version "Vision3v3.53". It has 10(0-9) levels of optimization during compiling. I am working on a project where requirement is to reduce the code size. In default settings...
EFFECT OF INBUILT OPTIMIZATION LEVELS IN CX51

Hi all, I am using Keil version "Vision3v3.53". It has 10(0-9) levels of optimization during compiling. I am working on a project where requirement is to reduce the code size. In default settings...
Effect of optimization levels while using freertos on cortex-R52

Hi everyone, When I'm using FreeRTOS with cortex R52, in optimization level O0, it works fine. context swithing is also fine. But when i use optimization level O3, there are so many issues and they...
Effect of optimization levels while using freertos on cortex-R52

Hi everyone, When I'm using FreeRTOS with cortex R52, in optimization level O0, it works fine. context swithing is also fine. But when i use optimization level O3, there are so many issues and they...
ARM Compiler optimization effects

Hello, I'm using Keil uVision V5.24.2.0 with ARM Compiler V5.06 update 5 (build 528). Initially, compiler optimization level was set to 1. With this level, I found that the address assigned...