• ISR Handling problem in LPC2378
    Hi, Please help I have written a c code for LPC2378 microcontroller, inorder to set a timer0 and generate an interrupt whenever the timer overflow occurs and the interrupt is mapped to VIC timer0...
  • ISR Handling problem in LPC2378
    Hi, Please help I have written a c code for LPC2378 microcontroller, inorder to set a timer0 and generate an interrupt whenever the timer overflow occurs and the interrupt is mapped to VIC timer0...
  • ARMv8 : How Cache Handling at EL3 is different to that of Cache handling in EL1 (NS=0)?
    Scenario: Sent a buffer reference and its size from EL1 secure world as a SIP SMC , such that EL3 write on that buffer and ERET to EL1. Query: 1. Does cache flush is required at any exception...
  • ARMv8 : How Cache Handling at EL3 is different to that of Cache handling in EL1 (NS=0)?
    Scenario: Sent a buffer reference and its size from EL1 secure world as a SIP SMC , such that EL3 write on that buffer and ERET to EL1. Query: 1. Does cache flush is required at any exception...
  • interrupt handling
    Hello Every one, In my project i have 2 external intr. How do i write the isr and how to handle these intrpt , how to write code in C for this task. Please help me in this.