Question about prioritized ARM interrupt

Note: This was originally posted on 3rd October 2011 at http://forums.arm.com One simple question but I did not find a clear answer. In the prioritized ARM interrupt, low and same priority interrupt will...
Question about my interrupt handler

I have an interrupt handler where I save several strings of data into RAM. Using strcpy or strncpy works just fine when I had less than 64K RAM on my board. We have moved to a system that has 128K...
Question about prioritized ARM interrupt

Note: This was originally posted on 3rd October 2011 at http://forums.arm.com One simple question but I did not find a clear answer. In the prioritized ARM interrupt, low and same priority interrupt will...
Question about my interrupt handler

I have an interrupt handler where I save several strings of data into RAM. Using strcpy or strncpy works just fine when I had less than 64K RAM on my board. We have moved to a system that has 128K...
A question about interrupt priority degrade

Hi guys, I found in armv8-arch ref manual that when PRIS bit in the AIRCR is set, the priority of non-secure handler is mapped to the bottom of the priority range. So I did an experiment. I configured...