HAL design pattern?

Hi, I'm trying to write a hardware abstraction layer. I'm trying to figure out how to write predefined values (for all needed register) to the 8-bit registers. I had some ideas and they were all bad...
HAL design pattern?

Hi, I'm trying to write a hardware abstraction layer. I'm trying to figure out how to write predefined values (for all needed register) to the 8-bit registers. I had some ideas and they were all bad...
Unaligned transfer pattern in AXI4

In this image, we can see during 2nd transfer bytes are being transferred at location 0x7,0x6,0x5,0x4. I am confused here, Why have not we transferred 4 bytes onto 0x3,0x2,0x1,0x0 ? Same question...
Unaligned transfer pattern in AXI4

In this image, we can see during 2nd transfer bytes are being transferred at location 0x7,0x6,0x5,0x4. I am confused here, Why have not we transferred 4 bytes onto 0x3,0x2,0x1,0x0 ? Same question...
Pattern only matches removed unused sections

During the linking, i have these 2 warnings : portage_task_latency.sct(15): warning: L6329W: Pattern LPC23_EMAC.o(ZI) only matches removed unused sections. portage_task_latency.sct(15): warning...